add PartitionedRepl into PartitionedSignal.__Repl__

[ieee754fpu.git] / src / ieee754 / part_repl / prepl.py

diff --git a/src/ieee754/part_repl/prepl.py b/src/ieee754/part_repl/prepl.py
new file mode 100644 (file)
index 0000000..b2b6495
--- /dev/null
+++ b/src/ieee754/part_repl/prepl.py
@@ -0,0 +1,27 @@
+# SPDX-License-Identifier: LGPL-2.1-or-later
+# See Notices.txt for copyright information
+
+"""
+Copyright (C) 2021 Luke Kenneth Casson Leighton <lkcl@lkcl.net>
+
+dynamically-partitionable "repl" class, directly equivalent
+to nmigen Repl
+
+See:
+
+* http://libre-riscv.org/3d_gpu/architecture/dynamic_simd/repl
+* http://bugs.libre-riscv.org/show_bug.cgi?id=709
+
+"""
+
+
+
+modcount = 0 # global for now
+def PRepl(m, repl, qty, mask):
+    from ieee754.part_repl.repl import PartitionedRepl # recursion issue
+    global modcount
+    modcount += 1
+    pc = PartitionedRepl(repl, qty, mask)
+    setattr(m.submodules, "repl%d" % modcount, pc)
+    return pc.output
+