reset shadow latches if neither success nor fail are applied

[soc.git] / src / scoreboard / dependence_cell.py

diff --git a/src/scoreboard/dependence_cell.py b/src/scoreboard/dependence_cell.py
index a45c5839785b05f0393080b7cf328b945abefa2a..fa0ff11a7da3920ab092fc5ee020fb9d7df3714e 100644 (file)
--- a/src/scoreboard/dependence_cell.py
+++ b/src/scoreboard/dependence_cell.py
@@ -51,7 +51,7 @@ class DepCell(Elaboratable):
         m.d.comb += l.r.eq(self.go_i)
 
         # Function Unit "Forward Progress".
-        m.d.comb += self.fwd_o.eq((l.q) & self.hazard_i)# & ~self.issue_i)
+        m.d.comb += self.fwd_o.eq((l.q) & self.hazard_i) # & ~self.issue_i)
 
         # Register Select. Activated on go read/write and *current* latch set
         m.d.comb += self.rsel_o.eq((cq | l.q) & self.go_i)
@@ -129,8 +129,7 @@ class DependenceCell(Elaboratable):
                                   (self.dest_i & self.src2_i))
 
         # connect up hazard checks: read-after-write and write-after-read
-        with m.If(~selfhazard):
-            m.d.comb += dest_c.hazard_i.eq(self.rd_pend_i) # read-after-write
+        m.d.comb += dest_c.hazard_i.eq(self.rd_pend_i) # read-after-write
         m.d.comb += src1_c.hazard_i.eq(self.wr_pend_i) # write-after-read
         m.d.comb += src2_c.hazard_i.eq(self.wr_pend_i) # write-after-read
 
@@ -144,8 +143,8 @@ class DependenceCell(Elaboratable):
         # to be accumulated to indicate if register is in use (globally)
         # after ORing, is fed back in to rd_pend_i / wr_pend_i
         m.d.comb += self.rd_rsel_o.eq(src1_c.q_o | src2_c.q_o)
-        with m.If(~selfhazard):
-            m.d.comb += self.wr_rsel_o.eq(dest_c.q_o)
+        #with m.If(~selfhazard):
+        m.d.comb += self.wr_rsel_o.eq(dest_c.q_o)
 
         return m