Merge branch 'master' of ssh://git.libre-riscv.org:922/soc

[soc.git] / src / soc / decoder / isa / __init__.py

diff --git a/src/soc/decoder/isa/__init__.py b/src/soc/decoder/isa/__init__.py
index 8f5f9f2a7cca983c183e99b82c6affc5fb3a3c98..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391 100644 (file)
--- a/src/soc/decoder/isa/__init__.py
+++ b/src/soc/decoder/isa/__init__.py
@@ -1,6 +0,0 @@
-from fixedarith import fixedarith
-from fixedload import fixedload
-
-
-class ISA(fixedarith, fixedload):
-    pass