Ooops, actually assert during cmpeqb

[soc.git] / src / soc / decoder / isa / test_caller.py

diff --git a/src/soc/decoder/isa/test_caller.py b/src/soc/decoder/isa/test_caller.py
index f15634722f8f94a46e3d7ce473f34a695a89f2ce..a8ddc3feabbbbc964a0b834cd2bbadf8677d8b89 100644 (file)
--- a/src/soc/decoder/isa/test_caller.py
+++ b/src/soc/decoder/isa/test_caller.py
@@ -264,6 +264,21 @@ class DecoderTestCase(FHDLTestCase):
             sim = self.run_tst_program(program, initial_regs)
             self.assertEqual(sim.gpr(2), SelectableInt(16, 64))
             self.assertEqual(sim.gpr(4), SelectableInt(8, 64))
+
+    def test_cmpeqb(self):
+        lst = ["cmpeqb cr0, 2, 1",
+               "cmpeqb cr1, 3, 1"]
+        initial_regs = [0] * 32
+        initial_regs[1] = 0x0102030405060708
+        initial_regs[2] = 0x04
+        initial_regs[3] = 0x10
+        with Program(lst) as program:
+            sim = self.run_tst_program(program, initial_regs)
+            self.assertEqual(sim.crl[0].get_range().value,
+                             SelectableInt(4, 4))
+            self.assertEqual(sim.crl[1].get_range().value,
+                             SelectableInt(0, 4))
+        
         
 
     def test_mtcrf(self):