add first SVP64 7-bit register context decoder to PowerDecoder2

[soc.git] / src / soc / decoder / power_decoder.py

diff --git a/src/soc/decoder/power_decoder.py b/src/soc/decoder/power_decoder.py
index 6712cd1d63fc5f518776423ecff2d3fbf1470270..bdad81ba701aecbf76be0e584a75d9c6ed0c9fb2 100644 (file)
--- a/src/soc/decoder/power_decoder.py
+++ b/src/soc/decoder/power_decoder.py
@@ -152,6 +152,8 @@ power_op_csvmap = {'function_unit': 'unit',
                    'sv_out': 'sv_out',
                    'sv_cr_in': 'sv_cr_in',
                    'sv_cr_out': 'sv_cr_out',
+                   'SV_Etype': 'SV_Etype',
+                   'SV_Ptype': 'SV_Ptype',
                    'cr_in': 'CR in',
                    'cr_out': 'CR out',
                    'ldst_len': 'ldst len',