stack of changes to MultiCompUnit to speed it up

[soc.git] / src / soc / experiment / pi2ls.py

diff --git a/src/soc/experiment/pi2ls.py b/src/soc/experiment/pi2ls.py
index 3964122b3ca21cc9bfa9c4d50487de69edec1b11..2e8643da33072c26363a248b85c0819338fa60ff 100644 (file)
--- a/src/soc/experiment/pi2ls.py
+++ b/src/soc/experiment/pi2ls.py
@@ -11,10 +11,10 @@
     busy_o/1        most likely to be x_busy_o
     go_die_i/1      rst?
     addr.data/48    x_addr_i (x_addr_i[:4] goes into LenExpand)
-    addr.ok/1       probably x_valid_i & ~x_stall_i
+    addr.ok/1       probably x_i_valid & ~x_stall_i
 
     addr_ok_o/1     no equivalent.  *might* work using x_stall_i
-    addr_exc_o/2(?) m_load_err_o and m_store_err_o
+    exc_o/6(?)      m_load_err_o and m_store_err_o
 
     ld.data/64      m_ld_data_o
     ld.ok/1         probably implicit, when x_busy drops low
@@ -46,12 +46,13 @@ class Pi2LSUI(PortInterfaceBase):
         self.lsui_busy = Signal()
         self.valid_l = SRLatch(False, name="valid")
 
-    def set_wr_addr(self, m, addr, mask):
+    def set_wr_addr(self, m, addr, mask, misalign, msr_pr, is_dcbz):
+        print("pi2lsui TODO, implement is_dcbz")
         m.d.comb += self.valid_l.s.eq(1)
         m.d.comb += self.lsui.x_mask_i.eq(mask)
         m.d.comb += self.lsui.x_addr_i.eq(addr)
 
-    def set_rd_addr(self, m, addr, mask):
+    def set_rd_addr(self, m, addr, mask, misalign, msr_pr):
         m.d.comb += self.valid_l.s.eq(1)
         m.d.comb += self.lsui.x_mask_i.eq(mask)
         m.d.comb += self.lsui.x_addr_i.eq(addr)
@@ -100,8 +101,8 @@ class Pi2LSUI(PortInterfaceBase):
                     m.next = "IDLE"
 
         # indicate valid at both ends. OR with lsui_busy (stops comb loop)
-        m.d.comb += self.lsui.m_valid_i.eq(self.valid_l.q )
-        m.d.comb += self.lsui.x_valid_i.eq(self.valid_l.q )
+        m.d.comb += self.lsui.m_i_valid.eq(self.valid_l.q )
+        m.d.comb += self.lsui.x_i_valid.eq(self.valid_l.q )
 
         # reset the valid latch when not busy.  sync to stop loop
         lsui_active = Signal()
@@ -154,7 +155,7 @@ class Pi2LSUI1(Elaboratable):
             # expand the LSBs of address plus LD/ST len into 16-bit mask
             m.d.comb += lsui.x_mask_i.eq(lenexp.lexp_o)
             # pass through the address, indicate "valid"
-            m.d.comb += lsui.x_valid_i.eq(1)
+            m.d.comb += lsui.x_i_valid.eq(1)
             # indicate "OK" - XXX should be checking address valid
             m.d.comb += pi.addr_ok_o.eq(1)