remove redunant signals

[soc.git] / src / soc / experiment / pimem.py

diff --git a/src/soc/experiment/pimem.py b/src/soc/experiment/pimem.py
index 2f089c91fbf0ef2fd93527032e6895f6ee96d835..664ee8175c2e6d7fa9034b6e786f74c4d62dd4b1 100644 (file)
--- a/src/soc/experiment/pimem.py
+++ b/src/soc/experiment/pimem.py
@@ -119,6 +119,14 @@ class PortInterface(RecordObject):
         self.virt_mode     = Signal()  # virtual mode
         self.priv_mode     = Signal()  # privileged mode
 
+        # mmu
+        self.mmu_done          = Signal() # keep for now
+       
+        # dcache
+        self.ldst_error        = Signal()
+        ## Signalling ld/st error - NC cache hit, TLB miss, prot/RC failure
+        self.cache_paradox     = Signal()
+
     def connect_port(self, inport):
         print("connect_port", self, inport)
         return [self.is_ld_i.eq(inport.is_ld_i),