rename InternalOp to MicrOp

[soc.git] / src / soc / fu / common_input_stage.py

diff --git a/src/soc/fu/common_input_stage.py b/src/soc/fu/common_input_stage.py
index d5916a0a7a0aa803f5f0a3a39b93a4d4d1b86b10..4dbb5c0712a59ac3451061071d6f907037aa69fb 100644 (file)
--- a/src/soc/fu/common_input_stage.py
+++ b/src/soc/fu/common_input_stage.py
@@ -3,7 +3,7 @@
 # generation for subtraction, should happen here
 from nmigen import (Module, Signal)
 from nmutil.pipemodbase import PipeModBase
-from soc.decoder.power_enums import InternalOp
+from soc.decoder.power_enums import MicrOp
 from soc.decoder.power_enums import CryIn