move over to from openpower imports

[soc.git] / src / soc / fu / div / formal / proof_main_stage.py

diff --git a/src/soc/fu/div/formal/proof_main_stage.py b/src/soc/fu/div/formal/proof_main_stage.py
index 5a2c0f8b2d18e12c43a4576e74e86f38905b6f6b..997d654dc4a816e46a7be3e220c1502c5d5393d4 100644 (file)
--- a/src/soc/fu/div/formal/proof_main_stage.py
+++ b/src/soc/fu/div/formal/proof_main_stage.py
@@ -16,7 +16,7 @@ from nmigen.cli import rtlil
 from soc.fu.logical.main_stage import LogicalMainStage
 from soc.fu.alu.pipe_data import ALUPipeSpec
 from soc.fu.alu.alu_input_record import CompALUOpSubset
-from soc.decoder.power_enums import MicrOp
+from openpower.decoder.power_enums import MicrOp
 import unittest