move over to from openpower imports

[soc.git] / src / soc / fu / logical / formal / proof_main_stage.py

diff --git a/src/soc/fu/logical/formal/proof_main_stage.py b/src/soc/fu/logical/formal/proof_main_stage.py
index e7cf254a8f31be2a2a783b47027261a7a9116ae1..179d9ba26926ebe63afefc57eb5ce56add73f5fb 100644 (file)
--- a/src/soc/fu/logical/formal/proof_main_stage.py
+++ b/src/soc/fu/logical/formal/proof_main_stage.py
@@ -16,7 +16,7 @@ from nmigen.cli import rtlil
 from soc.fu.logical.main_stage import LogicalMainStage
 from soc.fu.alu.pipe_data import ALUPipeSpec
 from soc.fu.alu.alu_input_record import CompALUOpSubset
-from soc.decoder.power_enums import MicrOp
+from openpower.decoder.power_enums import MicrOp
 import unittest