fix mul fu test helper.py not passing immediate to pia for mulli

[soc.git] / src / soc / fu / mul / pre_stage.py

diff --git a/src/soc/fu/mul/pre_stage.py b/src/soc/fu/mul/pre_stage.py
index 3ce2f9330f74f88e66a4b1cbec99ff16b1a31fa6..f22964dd5b50be0930fe6fa77c1841486b1363e1 100644 (file)
--- a/src/soc/fu/mul/pre_stage.py
+++ b/src/soc/fu/mul/pre_stage.py
@@ -1,7 +1,8 @@
-# This stage is intended to do most of the work of executing multiply
+# This stage is intended to prepare the multiplication operands
+
 from nmigen import (Module, Signal, Mux)
 from nmutil.pipemodbase import PipeModBase
-from soc.fu.alu.pipe_data import ALUInputData
+from soc.fu.div.pipe_data import DivInputData
 from soc.fu.mul.pipe_data import MulIntermediateData
 from ieee754.part.partsig import PartitionedSignal
 from nmutil.util import eq32
@@ -11,7 +12,7 @@ class MulMainStage1(PipeModBase):
         super().__init__(pspec, "mul1")
 
     def ispec(self):
-        return ALUInputData(self.pspec) # defines pipeline stage input format
+        return DivInputData(self.pspec) # defines pipeline stage input format
 
     def ospec(self):
         return MulIntermediateData(self.pspec) # pipeline stage output format
@@ -57,7 +58,6 @@ class MulMainStage1(PipeModBase):
 
         ###### XER and context, both pass-through #####
 
-        comb += self.o.xer_ca.eq(self.i.xer_ca)
         comb += self.o.xer_so.eq(self.i.xer_so)
         comb += self.o.ctx.eq(self.i.ctx)