move over to from openpower imports

[soc.git] / src / soc / fu / spr / main_stage.py

diff --git a/src/soc/fu/spr/main_stage.py b/src/soc/fu/spr/main_stage.py
index cca0c24e3c94ac9e18071310701198d31449fa63..6d9d13a6b85985d456da76347c6ebcda69f98dd9 100644 (file)
--- a/src/soc/fu/spr/main_stage.py
+++ b/src/soc/fu/spr/main_stage.py
@@ -7,11 +7,11 @@
 from nmigen import (Module, Signal, Cat)
 from nmutil.pipemodbase import PipeModBase
 from soc.fu.spr.pipe_data import SPRInputData, SPROutputData
-from soc.decoder.power_enums import MicrOp, SPRfull, SPRreduced, XER_bits
+from openpower.decoder.power_enums import MicrOp, SPRfull, SPRreduced, XER_bits
 
-from soc.decoder.power_fields import DecodeFields
-from soc.decoder.power_fieldsn import SignalBitRange
-from soc.decoder.power_decoder2 import decode_spr_num
+from openpower.decoder.power_fields import DecodeFields
+from openpower.decoder.power_fieldsn import SignalBitRange
+from openpower.decoder.power_decoder2 import decode_spr_num
 
 
 class SPRMainStage(PipeModBase):