radix: reading first page table entry

[soc.git] / src / soc / memory_pipe_experiment / __init__.py

diff --git a/src/soc/memory_pipe_experiment/__init__.py b/src/soc/memory_pipe_experiment/__init__.py
index 14e0132106c727ee3b2f15a3bcee9306f242c76c..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391 100644 (file)
--- a/src/soc/memory_pipe_experiment/__init__.py
+++ b/src/soc/memory_pipe_experiment/__init__.py
@@ -1,6 +0,0 @@
-from nmigen import Elaboratable, Module, Signal
-
-
-class L1Cache(Elaboratable):
-    def __init__(self, config):
-        self.config = config