detect the case in Core bitvector when the Function Unit says:

[soc.git] / src / soc / simple / issuer.py

diff --git a/src/soc/simple/issuer.py b/src/soc/simple/issuer.py
index 7312575d78d70304191023e34e0a81f59f53af24..24830149a606a981f08e697e489a658fd7cea892 100644 (file)
--- a/src/soc/simple/issuer.py
+++ b/src/soc/simple/issuer.py
@@ -861,9 +861,8 @@ class TestIssuerInternal(Elaboratable):
         pdecode2 = self.pdecode2
 
         # temporaries
-        core_busy_o = ~core.p.o_ready                # core is busy
+        core_busy_o = ~core.p.o_ready | core.n.o_data.busy_o # core is busy
         core_ivalid_i = core.p.i_valid              # instruction is valid
-        insn_type = core.i.e.do.insn_type           # instruction MicroOp type
 
         with m.FSM(name="exec_fsm"):
 
@@ -980,7 +979,7 @@ class TestIssuerInternal(Elaboratable):
             comb += dbg_rst.eq(ResetSignal())
 
         # busy/halted signals from core
-        core_busy_o = ~core.p.o_ready                # core is busy
+        core_busy_o = ~core.p.o_ready | core.n.o_data.busy_o # core is busy
         comb += self.busy_o.eq(core_busy_o)
         comb += pdecode2.dec.bigendian.eq(self.core_bigendian_i)