sync on ICP eint

[soc.git] / src / soc / simple / issuer.py

diff --git a/src/soc/simple/issuer.py b/src/soc/simple/issuer.py
index 788fdcacf5da57a18e3bdae4f2ec04905924ccde..5c3bb51a5f89e64161296c5592c170ed7b305a47 100644 (file)
--- a/src/soc/simple/issuer.py
+++ b/src/soc/simple/issuer.py
@@ -115,7 +115,7 @@ class TestIssuer(Elaboratable):
             m.submodules.xics_icp = icp = self.xics_icp
             m.submodules.xics_ics = ics = self.xics_ics
             comb += icp.ics_i.eq(ics.icp_o)           # connect ICS to ICP
-            comb += cur_state.eint.eq(icp.core_irq_o) # connect ICP to core
+            sync += cur_state.eint.eq(icp.core_irq_o) # connect ICP to core
 
         # GPIO test peripheral
         if self.gpio: