add SVP64 TestIssuer separate unit test

[soc.git] / src / soc / simple / test / test_issuer_svp64.py

diff --git a/src/soc/simple/test/test_issuer_svp64.py b/src/soc/simple/test/test_issuer_svp64.py
new file mode 100644 (file)
index 0000000..3e64f7a
--- /dev/null
+++ b/src/soc/simple/test/test_issuer_svp64.py
@@ -0,0 +1,24 @@
+"""test of SVP64 operations.
+
+related bugs:
+
+ * https://bugs.libre-soc.org/show_bug.cgi?id=363
+"""
+
+# NOTE: to use cxxsim, export NMIGEN_SIM_MODE=cxxsim from the shell
+# Also, check out the cxxsim nmigen branch, and latest yosys from git
+
+import unittest
+from soc.simple.test.test_runner import TestRunner
+
+# test with ALU data and Logical data
+from soc.fu.alu.test.svp64_cases import SVP64ALUTestCase
+
+
+if __name__ == "__main__":
+    unittest.main(exit=False)
+    suite = unittest.TestSuite()
+    suite.addTest(TestRunner(SVP64ALUTestCase().test_data))
+
+    runner = unittest.TextTestRunner()
+    runner.run(suite)