from openpower.util import log
from openpower.test.state import (State, state_add, state_factory,
TestState,)
-
+from soc.fu.compunits.test.test_compunit import get_l0_mem
class HDLState(State):
def __init__(self, core):
self.pcl.append(self.pc)
log("class hdl pc", hex(self.pc))
+ def get_mem(self):
+ # get the underlying HDL-simulated memory from the L0CacheBuffer
+ hdlmem = get_l0_mem(self.core.l0)
+ self.mem = {}
+ for i in range(hdlmem.depth):
+ value = yield hdlmem._array[i] # should not really do this
+ self.mem[i*8] = value
+
# add to State Factory
state_add('hdl', HDLState)