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fix 'Object is not an nMigen signal' error in test_sim.py
[soc.git]
/
src
/
soc
/
simulator
/
test_sim.py
diff --git
a/src/soc/simulator/test_sim.py
b/src/soc/simulator/test_sim.py
index 1c31075a134411ce8a143fe33d12ea244ebc93d3..068beacd8a1f6d25ce33b00efc661601b5d5152d 100644
(file)
--- a/
src/soc/simulator/test_sim.py
+++ b/
src/soc/simulator/test_sim.py
@@
-46,7
+46,7
@@
class DecoderTestCase(FHDLTestCase):
sim.add_process(process)
with sim.write_vcd("simulator.vcd", "simulator.gtkw",
- traces=
[pdecode2.ports()]
):
+ traces=
pdecode2.ports()
):
sim.run()
def test_example(self):