#define AMDGPU_NAVI10_RANGE 0x01, 0x0A
#define AMDGPU_NAVI12_RANGE 0x0A, 0x14
#define AMDGPU_NAVI14_RANGE 0x14, 0x28
-#define AMDGPU_SIENNA_RANGE 0x28, 0x32
+#define AMDGPU_SIENNA_CICHLID_RANGE 0x28, 0x32
#define AMDGPU_EXPAND_FIX(x) x
#define AMDGPU_RANGE_HELPER(val, min, max) ((val >= min) && (val < max))
#define ASICREV_IS_NAVI10_P(r) ASICREV_IS(r, NAVI10)
#define ASICREV_IS_NAVI12(r) ASICREV_IS(r, NAVI12)
#define ASICREV_IS_NAVI14(r) ASICREV_IS(r, NAVI14)
-#define ASICREV_IS_SIENNA_M(r) ASICREV_IS(r, SIENNA)
+#define ASICREV_IS_SIENNA_CICHLID(r) ASICREV_IS(r, SIENNA_CICHLID)
#endif // _AMDGPU_ASIC_ADDR_H
case FAMILY_NV:
m_settings.isDcn2 = 1;
- if (ASICREV_IS_SIENNA_M(chipRevision))
+ if (ASICREV_IS_SIENNA_CICHLID(chipRevision))
{
m_settings.supportRbPlus = 1;
m_settings.dccUnsup3DSwDis = 0;
identify_chip(NAVI10);
identify_chip(NAVI12);
identify_chip(NAVI14);
- identify_chip(SIENNA);
+ identify_chip(SIENNA_CICHLID);
break;
}
return false;
}
- if (info->family >= CHIP_SIENNA)
+ if (info->family >= CHIP_SIENNA_CICHLID)
info->chip_class = GFX10_3;
else if (info->family >= CHIP_NAVI10)
info->chip_class = GFX10;
case CHIP_RENOIR:
case CHIP_NAVI10:
case CHIP_NAVI12:
- case CHIP_SIENNA:
+ case CHIP_SIENNA_CICHLID:
pc_lines = 1024;
break;
case CHIP_NAVI14:
CHIP_NAVI10,
CHIP_NAVI12,
CHIP_NAVI14,
- CHIP_SIENNA,
+ CHIP_SIENNA_CICHLID,
CHIP_LAST,
};
return "gfx1011";
case CHIP_NAVI14:
return "gfx1012";
- case CHIP_SIENNA:
+ case CHIP_SIENNA_CICHLID:
return "gfx1030";
default:
return "";
info->family = i;
info->name = "OVERRIDDEN";
- if (i >= CHIP_SIENNA)
+ if (i >= CHIP_SIENNA_CICHLID)
info->chip_class = GFX10_3;
else if (i >= CHIP_NAVI10)
info->chip_class = GFX10;
dec->base.width > 32 && dec->stream_type == RDECODE_CODEC_VP9)
? align(dec->base.width, 64)
: align(dec->base.width, 32);
- if (((struct si_screen*)dec->screen)->info.family >= CHIP_SIENNA &&
+ if (((struct si_screen*)dec->screen)->info.family >= CHIP_SIENNA_CICHLID &&
dec->stream_type == RDECODE_CODEC_VP9)
decode->db_aligned_height = align(dec->base.height, 64);
dec->jpg.direct_reg = true;
break;
case CHIP_ARCTURUS:
- case CHIP_SIENNA:
+ case CHIP_SIENNA_CICHLID:
dec->reg.data0 = RDECODE_VCN2_5_GPCOM_VCPU_DATA0;
dec->reg.data1 = RDECODE_VCN2_5_GPCOM_VCPU_DATA1;
dec->reg.cmd = RDECODE_VCN2_5_GPCOM_VCPU_CMD;
goto error;
}
- if (sscreen->info.family >= CHIP_SIENNA)
+ if (sscreen->info.family >= CHIP_SIENNA_CICHLID)
radeon_enc_3_0_init(enc);
else if (sscreen->info.family >= CHIP_RENOIR)
radeon_enc_2_0_init(enc);
ws->info.family = i;
ws->info.name = "GCN-NOOP";
- if (i >= CHIP_SIENNA)
+ if (i >= CHIP_SIENNA_CICHLID)
ws->info.chip_class = GFX10_3;
else if (i >= CHIP_NAVI10)
ws->info.chip_class = GFX10;