use openpower.test.common

diff --git a/src/soc/fu/alu/test/test_pipe_caller.py b/src/soc/fu/alu/test/test_pipe_caller.py
index e117f9c1ad90daae82f3124fe16ae2fc628b3437..51aa0e5de436eb5666568c28d2e5027a1d392702 100644 (file)
--- a/src/soc/fu/alu/test/test_pipe_caller.py
+++ b/src/soc/fu/alu/test/test_pipe_caller.py
@@ -1,7 +1,7 @@
 import random
 from soc.fu.alu.pipe_data import ALUPipeSpec
 from soc.fu.alu.pipeline import ALUBasePipe
-from soc.fu.test.common import (TestCase, TestAccumulatorBase, ALUHelpers)
+from openpower.test.common import (TestCase, TestAccumulatorBase, ALUHelpers)
 from soc.config.endian import bigendian
 from openpower.decoder.isa.all import ISA
 from openpower.simulator.program import Program

diff --git a/src/soc/fu/branch/test/test_pipe_caller.py b/src/soc/fu/branch/test/test_pipe_caller.py
index f68374d13f423e02cda9c2d4bc94615b377bc270..221661f500912d7de96be32f58802bc0cb8902c0 100644 (file)
--- a/src/soc/fu/branch/test/test_pipe_caller.py
+++ b/src/soc/fu/branch/test/test_pipe_caller.py
@@ -16,7 +16,7 @@ from openpower.decoder.isa.all import ISA
 from soc.regfile.regfiles import FastRegs
 from soc.config.endian import bigendian
 
-from soc.fu.test.common import TestAccumulatorBase, TestCase, ALUHelpers
+from openpower.test.common import TestAccumulatorBase, TestCase, ALUHelpers
 from soc.fu.branch.pipeline import BranchBasePipe
 from soc.fu.branch.pipe_data import BranchPipeSpec
 import random

diff --git a/src/soc/fu/compunits/test/test_alu_compunit.py b/src/soc/fu/compunits/test/test_alu_compunit.py
index 73f84ee9bb0e6f3d544f5fbfba05a2e3a74106d7..5b00d3246b1f3d2170332eb31a8241755d475e2c 100644 (file)
--- a/src/soc/fu/compunits/test/test_alu_compunit.py
+++ b/src/soc/fu/compunits/test/test_alu_compunit.py
@@ -4,7 +4,7 @@ from openpower.decoder.power_enums import (XER_bits, Function)
 from soc.fu.alu.test.test_pipe_caller import get_cu_inputs
 from soc.fu.alu.test.test_pipe_caller import ALUTestCase  # creates the tests
 
-from soc.fu.test.common import ALUHelpers
+from openpower.test.common import ALUHelpers
 from soc.fu.compunits.compunits import ALUFunctionUnit
 from soc.fu.compunits.test.test_compunit import TestRunner
 from soc.config.endian import bigendian

diff --git a/src/soc/fu/compunits/test/test_cr_compunit.py b/src/soc/fu/compunits/test/test_cr_compunit.py
index 6dc3dfdcbd64bd17ac47359d11337d6eaeaa8a12..b03ecd495ee29ebb0aa0be32b8a2c041d2e3a4c8 100644 (file)
--- a/src/soc/fu/compunits/test/test_cr_compunit.py
+++ b/src/soc/fu/compunits/test/test_cr_compunit.py
@@ -7,7 +7,7 @@ from soc.fu.cr.test.test_pipe_caller import CRTestCase
 
 from soc.fu.compunits.compunits import CRFunctionUnit
 from soc.fu.compunits.test.test_compunit import TestRunner
-from soc.fu.test.common import mask_extend
+from openpower.util import mask_extend
 from soc.config.endian import bigendian
 
 

diff --git a/src/soc/fu/compunits/test/test_div_compunit.py b/src/soc/fu/compunits/test/test_div_compunit.py
index 06375b153a0c3f4c3b60d7694502755f76fb539b..3c7145e1fb408ee281c449bfa7dc19a0253bf6a2 100644 (file)
--- a/src/soc/fu/compunits/test/test_div_compunit.py
+++ b/src/soc/fu/compunits/test/test_div_compunit.py
@@ -4,7 +4,7 @@ from openpower.decoder.power_enums import (XER_bits, Function)
 from soc.fu.div.test.test_pipe_caller import get_cu_inputs
 from soc.fu.div.test.test_pipe_caller import DivTestCases  # creates the tests
 
-from soc.fu.test.common import ALUHelpers
+from openpower.test.common import ALUHelpers
 from soc.fu.compunits.compunits import DivFSMFunctionUnit
 from soc.fu.compunits.test.test_compunit import TestRunner
 from soc.config.endian import bigendian

diff --git a/src/soc/fu/compunits/test/test_ldst_compunit.py b/src/soc/fu/compunits/test/test_ldst_compunit.py
index b394a4fb47f45bf5053314c29b409b2cb21bbf69..357ce983c515e1d121874d112eb6359134f42c35 100644 (file)
--- a/src/soc/fu/compunits/test/test_ldst_compunit.py
+++ b/src/soc/fu/compunits/test/test_ldst_compunit.py
@@ -5,7 +5,7 @@ from soc.fu.ldst.test.test_pipe_caller import LDSTTestCase, get_cu_inputs
 
 from soc.fu.compunits.compunits import LDSTFunctionUnit
 from soc.fu.compunits.test.test_compunit import TestRunner
-from soc.fu.test.common import ALUHelpers
+from openpower.test.common import ALUHelpers
 from soc.config.endian import bigendian
 
 

diff --git a/src/soc/fu/compunits/test/test_logical_compunit.py b/src/soc/fu/compunits/test/test_logical_compunit.py
index 947261ca0148f79f72bcbb56c74c23a1c0c4b49d..6a4c3cb701540fcad46582bca8c2313837980cf2 100644 (file)
--- a/src/soc/fu/compunits/test/test_logical_compunit.py
+++ b/src/soc/fu/compunits/test/test_logical_compunit.py
@@ -6,7 +6,7 @@ from soc.fu.logical.test.test_pipe_caller import (LogicalTestCase,
 
 from soc.fu.compunits.compunits import LogicalFunctionUnit
 from soc.fu.compunits.test.test_compunit import TestRunner
-from soc.fu.test.common import ALUHelpers
+from openpower.test.common import ALUHelpers
 from soc.config.endian import bigendian
 
 

diff --git a/src/soc/fu/compunits/test/test_spr_compunit.py b/src/soc/fu/compunits/test/test_spr_compunit.py
index 3bdb90ea2b2146cf66e71030d90bb6e7b9945559..bfc8a50d487e0c58890af2c29f2c3234ce2a6a4f 100644 (file)
--- a/src/soc/fu/compunits/test/test_spr_compunit.py
+++ b/src/soc/fu/compunits/test/test_spr_compunit.py
@@ -4,7 +4,7 @@ from openpower.decoder.power_enums import (XER_bits, Function)
 from soc.fu.spr.test.test_pipe_caller import get_cu_inputs
 from soc.fu.spr.test.test_pipe_caller import SPRTestCase  # creates the tests
 
-from soc.fu.test.common import ALUHelpers
+from openpower.test.common import ALUHelpers
 from soc.fu.compunits.compunits import SPRFunctionUnit
 from soc.fu.compunits.test.test_compunit import TestRunner
 from soc.config.endian import bigendian

diff --git a/src/soc/fu/compunits/test/test_trap_compunit.py b/src/soc/fu/compunits/test/test_trap_compunit.py
index 68300ab68676e0a851e18b4176b9b6abd159c618..89f4ef6649f97c5ca0cf4d665aaabaa0d00e0019 100644 (file)
--- a/src/soc/fu/compunits/test/test_trap_compunit.py
+++ b/src/soc/fu/compunits/test/test_trap_compunit.py
@@ -4,7 +4,7 @@ from openpower.decoder.power_enums import (XER_bits, Function)
 from soc.fu.trap.test.test_pipe_caller import get_cu_inputs
 from soc.fu.trap.test.test_pipe_caller import TrapTestCase  # creates the tests
 
-from soc.fu.test.common import ALUHelpers
+from openpower.test.common import ALUHelpers
 from soc.fu.compunits.compunits import TrapFunctionUnit
 from soc.fu.compunits.test.test_compunit import TestRunner
 from soc.config.endian import bigendian

diff --git a/src/soc/fu/cr/test/test_pipe_caller.py b/src/soc/fu/cr/test/test_pipe_caller.py
index ec783718d893cf2ccd6952010d7ce0ed0412ccae..4501d28173187c539802422434ba601478d4aca6 100644 (file)
--- a/src/soc/fu/cr/test/test_pipe_caller.py
+++ b/src/soc/fu/cr/test/test_pipe_caller.py
@@ -15,8 +15,8 @@ from openpower.simulator.program import Program
 from openpower.decoder.isa.all import ISA
 from soc.config.endian import bigendian
 
-from soc.fu.test.common import TestAccumulatorBase, TestCase, ALUHelpers
-from soc.fu.test.common import mask_extend
+from openpower.test.common import TestAccumulatorBase, TestCase, ALUHelpers
+from openpower.util import mask_extend
 from soc.fu.cr.pipeline import CRBasePipe
 from soc.fu.cr.pipe_data import CRPipeSpec
 import random

diff --git a/src/soc/fu/div/test/helper.py b/src/soc/fu/div/test/helper.py
index 7c4f9d6915dc15c95cc0b2263f026f1e99637dcf..97da3f36f1c47a1a6c9e333e46ca526398c3faa1 100644 (file)
--- a/src/soc/fu/div/test/helper.py
+++ b/src/soc/fu/div/test/helper.py
@@ -13,7 +13,7 @@ from openpower.decoder.power_enums import XER_bits, Function
 from openpower.decoder.isa.all import ISA
 from soc.config.endian import bigendian
 
-from soc.fu.test.common import ALUHelpers
+from openpower.test.common import ALUHelpers
 from soc.fu.test.pia import pia_res_to_output
 from soc.fu.div.pipeline import DivBasePipe
 from soc.fu.div.pipe_data import DivPipeSpec

diff --git a/src/soc/fu/div/test/test_pipe_caller.py b/src/soc/fu/div/test/test_pipe_caller.py
index 30dc414c70bb74cfd6e69a5aac2bb6f37b1d03e7..e6cebc50fff4a2f8a207e86b94d772ac6dd5996f 100644 (file)
--- a/src/soc/fu/div/test/test_pipe_caller.py
+++ b/src/soc/fu/div/test/test_pipe_caller.py
@@ -3,7 +3,7 @@ import unittest
 from openpower.simulator.program import Program
 from soc.config.endian import bigendian
 
-from soc.fu.test.common import (TestCase, TestAccumulatorBase, skip_case)
+from openpower.test.common import (TestCase, TestAccumulatorBase, skip_case)
 from soc.fu.div.pipe_data import DivPipeKind
 
 from soc.fu.div.test.helper import (log_rand, get_cu_inputs,

diff --git a/src/soc/fu/div/test/test_pipe_caller_long.py b/src/soc/fu/div/test/test_pipe_caller_long.py
index 5d2970ca640a81758ab84071c1a4346fd541d6be..c91d4d96e34516a01f2aaab3819fde064f0ed16c 100644 (file)
--- a/src/soc/fu/div/test/test_pipe_caller_long.py
+++ b/src/soc/fu/div/test/test_pipe_caller_long.py
@@ -2,7 +2,7 @@ import unittest
 from openpower.simulator.program import Program
 from soc.config.endian import bigendian
 
-from soc.fu.test.common import TestAccumulatorBase
+from openpower.test.common import TestAccumulatorBase
 from soc.fu.div.test.helper import DivTestHelper
 from soc.fu.div.pipe_data import DivPipeKind
 

diff --git a/src/soc/fu/ldst/test/test_pipe_caller.py b/src/soc/fu/ldst/test/test_pipe_caller.py
index 0bffbb1c790869b1d2b830bb451ee271196a19d4..d738fcb4bd435afa278a435b69f7ce9b6cf3c226 100644 (file)
--- a/src/soc/fu/ldst/test/test_pipe_caller.py
+++ b/src/soc/fu/ldst/test/test_pipe_caller.py
@@ -12,7 +12,7 @@ from openpower.decoder.isa.all import ISA
 from soc.config.endian import bigendian
 
 
-from soc.fu.test.common import TestAccumulatorBase, TestCase
+from openpower.test.common import TestAccumulatorBase, TestCase
 from soc.fu.ldst.pipe_data import LDSTPipeSpec
 import random
 

diff --git a/src/soc/fu/logical/test/test_pipe_caller.py b/src/soc/fu/logical/test/test_pipe_caller.py
index a6b87e3e3e04487f5aacaaee27e2bfc133e0115f..b11e182a1e61fdfe5826602f14135dd1a616c320 100644 (file)
--- a/src/soc/fu/logical/test/test_pipe_caller.py
+++ b/src/soc/fu/logical/test/test_pipe_caller.py
@@ -17,7 +17,7 @@ from openpower.decoder.isa.all import ISA
 from soc.config.endian import bigendian
 
 
-from soc.fu.test.common import TestAccumulatorBase, TestCase, ALUHelpers
+from openpower.test.common import TestAccumulatorBase, TestCase, ALUHelpers
 from soc.fu.logical.pipeline import LogicalBasePipe
 from soc.fu.logical.pipe_data import LogicalPipeSpec
 import random

diff --git a/src/soc/fu/mmu/test/test_issuer_mmu_data_path.py b/src/soc/fu/mmu/test/test_issuer_mmu_data_path.py
index 599b69a8d28afbe15d1bc692d09deba940a51a1c..095f465b32064e701bea5dd940e37129ed9f4f65 100644 (file)
--- a/src/soc/fu/mmu/test/test_issuer_mmu_data_path.py
+++ b/src/soc/fu/mmu/test/test_issuer_mmu_data_path.py
@@ -4,7 +4,7 @@ from openpower.simulator.program import Program
 from soc.config.endian import bigendian
 import unittest
 
-from soc.fu.test.common import (
+from openpower.test.common import (
     TestAccumulatorBase, skip_case, TestCase, ALUHelpers)
 
 # this test case takes about half a minute to run on my Talos II

diff --git a/src/soc/fu/mmu/test/test_issuer_mmu_rom.py b/src/soc/fu/mmu/test/test_issuer_mmu_rom.py
index f1a80fc7462f35a32b4e42d8c9593162f0d3f05d..6044ad464464eea1555878b3e2f5bc85ebca0595 100644 (file)
--- a/src/soc/fu/mmu/test/test_issuer_mmu_rom.py
+++ b/src/soc/fu/mmu/test/test_issuer_mmu_rom.py
@@ -4,7 +4,7 @@ from openpower.simulator.program import Program
 from soc.config.endian import bigendian
 import unittest
 
-from soc.fu.test.common import (TestAccumulatorBase, skip_case, TestCase,
+from openpower.test.common import (TestAccumulatorBase, skip_case, TestCase,
                                 ALUHelpers)
 
 def b(x):

diff --git a/src/soc/fu/mmu/test/test_non_production_core.py b/src/soc/fu/mmu/test/test_non_production_core.py
index c498d71b402048bce82e2da13d12b522a367bc34..7c00c1614e2a3d64d58a639d478d4f44ff9a0045 100644 (file)
--- a/src/soc/fu/mmu/test/test_non_production_core.py
+++ b/src/soc/fu/mmu/test/test_non_production_core.py
@@ -15,7 +15,7 @@ from soc.config.endian import bigendian
 from openpower.consts import MSR
 
 
-from soc.fu.test.common import (
+from openpower.test.common import (
     TestAccumulatorBase, skip_case, TestCase, ALUHelpers)
 import random
 

diff --git a/src/soc/fu/mmu/test/test_pipe_caller.py b/src/soc/fu/mmu/test/test_pipe_caller.py
index 24d39044d849d0fcc0e51ca8360ac468c05845c3..d62c8ae76d13bc3cf55f0a1cb1fa11a51e38230c 100644 (file)
--- a/src/soc/fu/mmu/test/test_pipe_caller.py
+++ b/src/soc/fu/mmu/test/test_pipe_caller.py
@@ -17,7 +17,7 @@ from soc.config.endian import bigendian
 from openpower.consts import MSR
 
 
-from soc.fu.test.common import (
+from openpower.test.common import (
     TestAccumulatorBase, skip_case, TestCase, ALUHelpers)
 #from soc.fu.spr.pipeline import SPRBasePipe
 #from soc.fu.spr.pipe_data import SPRPipeSpec

diff --git a/src/soc/fu/mul/test/helper.py b/src/soc/fu/mul/test/helper.py
index 140dd8fb143b0694b566e4de1dd0bf72069d38ad..b740182834dd37bc1640bdd0a7b1ccf88133a570 100644 (file)
--- a/src/soc/fu/mul/test/helper.py
+++ b/src/soc/fu/mul/test/helper.py
@@ -17,7 +17,7 @@ from openpower.simulator.program import Program
 from openpower.decoder.isa.all import ISA
 from soc.config.endian import bigendian
 
-from soc.fu.test.common import (TestAccumulatorBase, TestCase, ALUHelpers)
+from openpower.test.common import (TestAccumulatorBase, TestCase, ALUHelpers)
 from soc.fu.test.pia import pia_res_to_output
 from soc.fu.mul.pipeline import MulBasePipe
 from soc.fu.mul.pipe_data import MulPipeSpec

diff --git a/src/soc/fu/mul/test/test_pipe_caller.py b/src/soc/fu/mul/test/test_pipe_caller.py
index e4f27f33257aae985f3ab0f87b09c8c5a438831e..d57313b00efbf7426ac0c59f8286c65058021a39 100644 (file)
--- a/src/soc/fu/mul/test/test_pipe_caller.py
+++ b/src/soc/fu/mul/test/test_pipe_caller.py
@@ -2,7 +2,7 @@ import unittest
 from soc.fu.mul.test.helper import MulTestHelper
 from openpower.simulator.program import Program
 from soc.config.endian import bigendian
-from soc.fu.test.common import TestAccumulatorBase, skip_case
+from openpower.test.common import TestAccumulatorBase, skip_case
 
 import random
 

diff --git a/src/soc/fu/mul/test/test_pipe_caller_long.py b/src/soc/fu/mul/test/test_pipe_caller_long.py
index 56d8795a80c25e39e996a8d0c93e5edac35b4959..6a507c387d6e1330ade73469422a3831374ba49c 100644 (file)
--- a/src/soc/fu/mul/test/test_pipe_caller_long.py
+++ b/src/soc/fu/mul/test/test_pipe_caller_long.py
@@ -2,7 +2,7 @@ import unittest
 from soc.fu.mul.test.helper import MulTestHelper
 from openpower.simulator.program import Program
 from soc.config.endian import bigendian
-from soc.fu.test.common import (TestAccumulatorBase)
+from openpower.test.common import (TestAccumulatorBase)
 import random
 
 

diff --git a/src/soc/fu/shift_rot/test/test_pipe_caller.py b/src/soc/fu/shift_rot/test/test_pipe_caller.py
index fae3d0291894e7586811a8637b907857f8e24f58..e54179edb480cf30332b5d951e33943579c18297 100644 (file)
--- a/src/soc/fu/shift_rot/test/test_pipe_caller.py
+++ b/src/soc/fu/shift_rot/test/test_pipe_caller.py
@@ -2,7 +2,7 @@ import random
 from soc.fu.shift_rot.pipe_data import ShiftRotPipeSpec
 from soc.fu.alu.alu_input_record import CompALUOpSubset
 from soc.fu.shift_rot.pipeline import ShiftRotBasePipe
-from soc.fu.test.common import TestAccumulatorBase, TestCase, ALUHelpers
+from openpower.test.common import TestAccumulatorBase, TestCase, ALUHelpers
 from soc.config.endian import bigendian
 from openpower.decoder.isa.all import ISA
 from openpower.simulator.program import Program

diff --git a/src/soc/fu/spr/test/test_pipe_caller.py b/src/soc/fu/spr/test/test_pipe_caller.py
index 1f70041c5d88ad34f1cc3f61c7ce410567cacbe7..7b7290b139a130f6c8d3462aa8c19d6813ff2938 100644 (file)
--- a/src/soc/fu/spr/test/test_pipe_caller.py
+++ b/src/soc/fu/spr/test/test_pipe_caller.py
@@ -17,7 +17,7 @@ from soc.config.endian import bigendian
 from openpower.consts import MSR
 
 
-from soc.fu.test.common import (
+from openpower.test.common import (
     TestAccumulatorBase, skip_case, TestCase, ALUHelpers)
 from soc.fu.spr.pipeline import SPRBasePipe
 from soc.fu.spr.pipe_data import SPRPipeSpec

diff --git a/src/soc/fu/test/common.py b/src/soc/fu/test/common.py
deleted file mode 100644 (file)
index c5b6069..0000000
--- a/src/soc/fu/test/common.py
+++ /dev/null
@@ -1,7 +0,0 @@
-# moved to openpower-isa
-# https://git.libre-soc.org/?p=openpower-isa.git;a=summary
-# wildcard imports here ONLY to support migration
-
-from openpower.test.common import *
-from openpower.util import mask_extend
-

diff --git a/src/soc/fu/trap/test/test_pipe_caller.py b/src/soc/fu/trap/test/test_pipe_caller.py
index b9cea5c5f2c538bca169a8c48972e42f067f275e..994bdf5023899a1cb148d3a23b106b01fcf074d2 100644 (file)
--- a/src/soc/fu/trap/test/test_pipe_caller.py
+++ b/src/soc/fu/trap/test/test_pipe_caller.py
@@ -17,7 +17,7 @@ from openpower.decoder.isa.all import ISA
 from soc.config.endian import bigendian
 from openpower.consts import MSR
 
-from soc.fu.test.common import (TestAccumulatorBase, TestCase, ALUHelpers)
+from openpower.test.common import (TestAccumulatorBase, TestCase, ALUHelpers)
 from soc.fu.trap.pipeline import TrapBasePipe
 from soc.fu.trap.pipe_data import TrapPipeSpec
 import random

diff --git a/src/soc/simple/test/test_microwatt.py b/src/soc/simple/test/test_microwatt.py
index a7af832847f028a766bddd111dfadca34b031404..b89867e480c06afcb83acbefd451db32e08653de 100644 (file)
--- a/src/soc/simple/test/test_microwatt.py
+++ b/src/soc/simple/test/test_microwatt.py
@@ -1,5 +1,5 @@
 from openpower.simulator.program import Program
-from soc.fu.test.common import TestCase
+from openpower.test.common import TestCase
 
 import unittest