use openpower.test.common
[soc.git] / src / soc / fu / compunits / test / test_alu_compunit.py
2021-04-23 Luke Kenneth Casso... use openpower.test.common
2021-04-23 Luke Kenneth Casso... move over to from openpower imports
2020-07-26 Luke Kenneth Casso... convert ALU to new accumulator style
2020-07-22 Jacob LifshayMerge remote-tracking branch 'origin/master'
2020-07-22 Jacob Lifshayformat code
2020-07-11 Luke Kenneth Casso... add bigendian flag
2020-07-08 Jacob LifshayMerge branch 'master' of ssh://git.libre-riscv.org...
2020-07-06 Luke Kenneth Casso... adding mtspr tests
2020-07-05 Luke Kenneth Casso... big reorg on PowerDecoder2, actually Decode2Execute1Type
2020-06-11 Luke Kenneth Casso... fixing get_rd_sim_xer_ca, has to only read carry if...
2020-06-11 Luke Kenneth Casso... rename get_sim_cr_a to get_wr_sim_cr_a for now
2020-06-10 Luke Kenneth Casso... use ALUHelpers in output phase of test_alu_compunit.py
2020-06-04 Luke Kenneth Casso... no global variables in test suites
2020-06-03 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org...
2020-06-03 Luke Kenneth Casso... reorganise ALU tests, move get_cu_inputs function to...
2020-06-03 Luke Kenneth Casso... worked out how to dynamically enable carry-in to ALU...
2020-06-03 Luke Kenneth Casso... correct overflow-enable flags for rdmask specs in ALU
2020-06-03 Luke Kenneth Casso... attempt to make carry-in and overflow-enable optional...
2020-06-02 Luke Kenneth Casso... rename regspecs to give a consistent naming scheme
2020-06-01 Luke Kenneth Casso... RS moved to port 1 (from port 3), remove need in ALU...
2020-05-31 Luke Kenneth Casso... add logical compunit test
2020-05-31 Luke Kenneth Casso... comment inputs and outputs from ALU unit test
2020-05-31 Luke Kenneth Casso... imports - use of globals. baaaad
2020-05-31 Luke Kenneth Casso... remove unneeded code and inputs. convert to "naming...
2020-05-31 Luke Kenneth Casso... split out common code from test_alu_compunit.py
2020-05-31 Luke Kenneth Casso... de-hard-code-ify getting results from MultiCompUnit
2020-05-31 Luke Kenneth Casso... OP_CMP is requesting a change of the output register...
2020-05-31 Luke Kenneth Casso... more debug statements
2020-05-31 Luke Kenneth Casso... add in more CR debug statements
2020-05-31 Luke Kenneth Casso... write cr0 when op.write_cr.ok is set
2020-05-31 Luke Kenneth Casso... comment out xer ov/so for now
2020-05-30 Luke Kenneth Casso... get carry from cr write_cr
2020-05-30 Luke Kenneth Casso... add in write-mask into MultiCompUnit and MCU-ALU unit...
2020-05-30 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org...
2020-05-30 Luke Kenneth Casso... create read-mask for ALU CompUnit: switches off optiona...
2020-05-30 Luke Kenneth Casso... mess - but a functional mess. ALU-MultiCompUnit semi...
2020-05-30 Luke Kenneth Casso... grab other results from ALU pipeline in compunit test
2020-05-30 Luke Kenneth Casso... order of XER so/ca wrong way round from regspec
2020-05-29 Luke Kenneth Casso... trigger read ALU ready/valid from latch as well
2020-05-28 Luke Kenneth Casso... extra check on rd.req in test_alu_compunit
2020-05-28 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org...
2020-05-28 Luke Kenneth Casso... debug-print rd/wr rel in test_alu_compunit
2020-05-28 Luke Kenneth Casso... debugging test_alu_compunit.py
2020-05-28 Luke Kenneth Casso... start on a compunit ALU test