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use openpower.test.common
[soc.git]
/
src
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soc
/
fu
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compunits
/
test
/
test_alu_compunit.py
2021-04-23
Luke Kenneth Casso...
use openpower.test.common
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2021-04-23
Luke Kenneth Casso...
move over to from openpower imports
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2020-07-26
Luke Kenneth Casso...
convert ALU to new accumulator style
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2020-07-22
Jacob Lifshay
Merge remote-tracking branch 'origin/master'
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2020-07-22
Jacob Lifshay
format code
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2020-07-11
Luke Kenneth Casso...
add bigendian flag
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2020-07-08
Jacob Lifshay
Merge branch 'master' of ssh://git.libre-riscv.org...
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2020-07-06
Luke Kenneth Casso...
adding mtspr tests
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2020-07-05
Luke Kenneth Casso...
big reorg on PowerDecoder2, actually Decode2Execute1Type
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2020-06-11
Luke Kenneth Casso...
fixing get_rd_sim_xer_ca, has to only read carry if...
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2020-06-11
Luke Kenneth Casso...
rename get_sim_cr_a to get_wr_sim_cr_a for now
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2020-06-10
Luke Kenneth Casso...
use ALUHelpers in output phase of test_alu_compunit.py
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2020-06-04
Luke Kenneth Casso...
no global variables in test suites
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2020-06-03
Tobias Platen
Merge branch 'master' of ssh://git.libre-riscv.org...
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2020-06-03
Luke Kenneth Casso...
reorganise ALU tests, move get_cu_inputs function to...
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2020-06-03
Luke Kenneth Casso...
worked out how to dynamically enable carry-in to ALU...
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2020-06-03
Luke Kenneth Casso...
correct overflow-enable flags for rdmask specs in ALU
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2020-06-03
Luke Kenneth Casso...
attempt to make carry-in and overflow-enable optional...
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2020-06-02
Luke Kenneth Casso...
rename regspecs to give a consistent naming scheme
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2020-06-01
Luke Kenneth Casso...
RS moved to port 1 (from port 3), remove need in ALU...
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2020-05-31
Luke Kenneth Casso...
add logical compunit test
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2020-05-31
Luke Kenneth Casso...
comment inputs and outputs from ALU unit test
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2020-05-31
Luke Kenneth Casso...
imports - use of globals. baaaad
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2020-05-31
Luke Kenneth Casso...
remove unneeded code and inputs. convert to "naming...
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2020-05-31
Luke Kenneth Casso...
split out common code from test_alu_compunit.py
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2020-05-31
Luke Kenneth Casso...
de-hard-code-ify getting results from MultiCompUnit
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2020-05-31
Luke Kenneth Casso...
OP_CMP is requesting a change of the output register...
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2020-05-31
Luke Kenneth Casso...
more debug statements
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2020-05-31
Luke Kenneth Casso...
add in more CR debug statements
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2020-05-31
Luke Kenneth Casso...
write cr0 when op.write_cr.ok is set
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2020-05-31
Luke Kenneth Casso...
comment out xer ov/so for now
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2020-05-30
Luke Kenneth Casso...
get carry from cr write_cr
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2020-05-30
Luke Kenneth Casso...
add in write-mask into MultiCompUnit and MCU-ALU unit...
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2020-05-30
Tobias Platen
Merge branch 'master' of ssh://git.libre-riscv.org...
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2020-05-30
Luke Kenneth Casso...
create read-mask for ALU CompUnit: switches off optiona...
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2020-05-30
Luke Kenneth Casso...
mess - but a functional mess. ALU-MultiCompUnit semi...
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2020-05-30
Luke Kenneth Casso...
grab other results from ALU pipeline in compunit test
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2020-05-30
Luke Kenneth Casso...
order of XER so/ca wrong way round from regspec
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2020-05-29
Luke Kenneth Casso...
trigger read ALU ready/valid from latch as well
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2020-05-28
Luke Kenneth Casso...
extra check on rd.req in test_alu_compunit
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2020-05-28
Tobias Platen
Merge branch 'master' of ssh://git.libre-riscv.org...
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2020-05-28
Luke Kenneth Casso...
debug-print rd/wr rel in test_alu_compunit
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2020-05-28
Luke Kenneth Casso...
debugging test_alu_compunit.py
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2020-05-28
Luke Kenneth Casso...
start on a compunit ALU test
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