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Wire up missing CRG / DDR3 clock control / reset signals
[ls2.git]
/
coldboot
/
2022-04-09
Luke Kenneth Casso...
sigh use MEMORY_BASE which is at 0x0000_0000 and coinci...
tree
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commitdiff
2022-04-09
Luke Kenneth Casso...
shuffle addresses around a bit
tree
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commitdiff
2022-04-08
Luke Kenneth Casso...
add DRAM offset into SYSCON and jump to DRAM if flash...
tree
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commitdiff
2022-04-08
Luke Kenneth Casso...
add ELF reading to coldboot.c, move spi address to...
tree
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commitdiff
2022-04-08
Luke Kenneth Casso...
add read of SYSCON and entry for SPIFlash
tree
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commitdiff
2022-04-08
Luke Kenneth Casso...
up the delay-time on ddr3 reset, put loop around dram...
tree
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commitdiff
2022-04-07
Raptor Engineering...
Update coldboot DDR3 init firmware to work with latest...
tree
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commitdiff
2022-04-07
Raptor Engineering...
Add an asm dump with source to the coldboot makefile
tree
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commitdiff
2022-04-04
Luke Kenneth Casso...
disable ethmac for now, pass firmware.hex to cypress...
tree
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commitdiff
2022-04-04
Luke Kenneth Casso...
redo start address of firmware so it can be specified...
tree
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commitdiff
2022-03-31
Luke Kenneth Casso...
reduce number of params obtained on QSPI for icarus sim
tree
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commitdiff
2022-03-31
Luke Kenneth Casso...
got icarus verilog model of QSPI working and it returns...
tree
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commitdiff
2022-03-31
Luke Kenneth Casso...
whitespace cleanup
tree
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commitdiff
2022-03-29
Luke Kenneth Casso...
add config-dump from SPI
tree
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commitdiff
2022-03-29
Luke Kenneth Casso...
quick-and-dirty QSPI read test
tree
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commitdiff
2022-03-28
Luke Kenneth Casso...
quick memory test increasing by power-2 each time shows...
tree
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commitdiff
2022-03-27
Luke Kenneth Casso...
try latency of 7 for winbond hyperram
tree
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commitdiff
2022-03-26
Luke Kenneth Casso...
add hyperram iverilog runner including s27kl0641.v...
tree
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commitdiff
2022-03-25
Luke Kenneth Casso...
loop-test on hyperram read/write which needs carriage...
tree
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commitdiff
2022-03-22
Luke Kenneth Casso...
adding hyperram for arty a7 and also adding a workaroun...
tree
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commitdiff
2022-03-19
Luke Kenneth Casso...
move quick read/write test for hyperram in coldboot.c
tree
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commitdiff
2022-03-17
Luke Kenneth Casso...
work-in-progress on DDR3 firmware. sigh
tree
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commitdiff
2022-03-10
Luke Kenneth Casso...
sigh gramWishbone is not WB4-pipeline-burst-compliant
tree
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commitdiff
2022-02-21
Luke Kenneth Casso...
lengthen cdelay pauses by a factor of 10
tree
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commitdiff
2022-02-21
Luke Kenneth Casso...
* use readl and writel for accessing memory
tree
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commitdiff
2022-02-21
Luke Kenneth Casso...
use microwatt mmu powerpc.lds with better stack space
tree
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commitdiff
2022-02-20
Luke Kenneth Casso...
set RAM base to #defined DRAM_BASE not hard-coded value
tree
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commitdiff
2022-02-19
Luke Kenneth Casso...
match up dram initialisation parameters
tree
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commitdiff
2022-02-19
Luke Kenneth Casso...
put together coldboot startup firmware
tree
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commitdiff