git.libre-soc.org Git - soclayout.git/history

2021-06-05	Luke Kenneth Casso...	set power type in fake pll vdd/vss	blob \| commitdiff \| raw
2021-06-05	Luke Kenneth Casso...	whoops, fake pll/mem need vss/vdd	blob \| commitdiff \| raw \| diff to current
2021-06-03	Luke Kenneth Casso...	rename ref in fake-pll to ref_v	blob \| commitdiff \| raw \| diff to current
2021-05-27	Luke Kenneth Casso...	set fake PLL Master Cell directions explicitly	blob \| commitdiff \| raw \| diff to current
2021-05-25	Luke Kenneth Casso...	attempt better grid alignment for fake cells	blob \| commitdiff \| raw \| diff to current
2021-05-25	Luke Kenneth Casso...	change cell sizes to grid layout (?)	blob \| commitdiff \| raw \| diff to current
2021-05-25	Luke Kenneth Casso...	rename pll out signal to out_v in "fake" pll cell	blob \| commitdiff \| raw \| diff to current
2021-05-24	Luke Kenneth Casso...	remove "*" net from fake-pll cell, it ends up in the...	blob \| commitdiff \| raw \| diff to current
2021-05-24	Luke Kenneth Casso...	round to 0.135 cell grid?	blob \| commitdiff \| raw \| diff to current
2021-05-24	Luke Kenneth Casso...	add dummy/fake/ghost PLL blackbox cell	blob \| commitdiff \| raw \| diff to current