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Use medany code model, not PIC, for ISA tests
[riscv-tests.git] / isa / macros /
2015-03-21 Andrew WatermanAdd fdiv test tree | commitdiff
2015-03-17 Yunsup Leerelay hwacha cause/aux to scause/sbadaddr tree | commitdiff
2015-03-16 Yunsup Leerevamp vector tests with new privileged spec, and add... tree | commitdiff
2015-03-13 Andrew WatermanUpdate to new privileged spec tree | commitdiff
2015-01-10 Andrew WatermanAdd LICENSE tree | commitdiff
2015-01-05 Andrew WatermanAvoid deprecated "b" pseudo-op; use "j" instead tree | commitdiff
2014-12-04 Andrew WatermanRely on assembler to relax far branches tree | commitdiff
2014-03-18 Andrew WatermanCheck FP corner cases and flags tree | commitdiff
2014-02-11 Adam IzraelevitzMerge branch 'master' of github.com:ucb-bar/riscv-tests tree | commitdiff
2014-01-31 Andrew WatermanReference TESTNUM instead of x28 directly tree | commitdiff
2013-11-24 Andrew WatermanUpdate to new privileged ISA tree | commitdiff
2013-11-06 Yunsup Leecorrectly set SR_EA bit for all vector physical tests tree | commitdiff
2013-10-18 Yunsup Leeadd hwacha exception support tree | commitdiff
2013-10-10 Christopher CelioMerge branch 'master' of github.com:ucb-bar/riscv-tests tree | commitdiff
2013-10-10 Yunsup Leerevamp hwacha tests tree | commitdiff
2013-08-24 Andrew WatermanReflect changes to ISA tree | commitdiff
2013-04-24 Yunsup Leeadd more header information to test_macros tree | commitdiff
2013-04-22 Yunsup Leeinitial commit tree | commitdiff