pysvp64db: fix traversal
[openpower-isa.git] / openpower / isa / svfixedarith.mdwn
2023-03-08 Luke Kenneth Casso... update pseudocode for dsld/dsrd to note that only when...
2022-11-11 Jacob Lifshayadd maddedus
2022-11-11 Jacob LifshayXLEN-ify maddedu
2022-11-11 Jacob Lifshayfix maddedu title line
2022-10-28 Luke Kenneth Casso... dsld: MASK(0, 63-n) works just as well as MASK(64,...
2022-10-28 Luke Kenneth Casso... overflow condition in dsld and dsrd if RS is non-zero
2022-10-28 Luke Kenneth Casso... fix dsrd pseudocode to use ROTL64 not ROTL128
2022-10-28 Luke Kenneth Casso... fix dsld pseudocode to use ROTL64 instead of ROTL128
2022-10-28 Luke Kenneth Casso... fix dsrd, ROTL128 use 128-n not 64-n,
2022-10-28 Luke Kenneth Casso... fix dsrd pseudocode for new 3-in 2-out
2022-10-28 Luke Kenneth Casso... sort out dsld pseudocode, creating mask is tricky
2022-10-28 Luke Kenneth Casso... endeavouring to implement shift-carry-dsld
2022-10-28 Luke Kenneth Casso... first cut pseudocode for dsld/dsrd to be 3-in 1-out,
2022-10-25 Luke Kenneth Casso... code-comments on divmod2du and maddedu are wrong
2022-10-22 Luke Kenneth Casso... argh, extremely annoying: 4-operand dsld/dsrd is not...
2022-10-22 Luke Kenneth Casso... bigint shuffle
2022-09-29 Jacob Lifshayrename madded->maddedu for consistency with PowerISA...
2022-09-29 Jacob Lifshayrename divrem2du->divmod2du for consistency with PowerI...
2022-09-29 Jacob Lifshayadd bigint tests and fix madded pseudocode
2022-09-29 Jacob Lifshayfill out dsld/dsrd pseudocode
2022-09-29 Jacob Lifshayclean up bigint instruction naming
2022-09-28 Luke Kenneth Casso... new revision of dsld
2022-09-28 Luke Kenneth Casso... add double-sld pseudocode, first draft
2022-05-03 Luke Kenneth Casso... code-comments on madded and divmod2du should say RS...
2022-05-03 Luke Kenneth Casso... properly fix pagereader.py to parse markdown with inden...
2022-05-03 Jacob Lifshayfix syntax error
2022-04-29 Luke Kenneth Casso... higher bits need to be checked for overflow not lower
2022-04-29 Luke Kenneth Casso... invert RC and RA, making divmod2du more like divdu
2022-04-27 Luke Kenneth Casso... accidentally added svfixedarith.mdwn to wiki rather...