git.libre-soc.org Git - openpower-isa.git/history - openpower/isa/svfixedarith.mdwn

2022-09-29	Jacob Lifshay	rename madded->maddedu for consistency with PowerISA...	blob \| commitdiff \| raw
2022-09-29	Jacob Lifshay	rename divrem2du->divmod2du for consistency with PowerI...	blob \| commitdiff \| raw \| diff to current
2022-09-29	Jacob Lifshay	add bigint tests and fix madded pseudocode	blob \| commitdiff \| raw \| diff to current
2022-09-29	Jacob Lifshay	fill out dsld/dsrd pseudocode	blob \| commitdiff \| raw \| diff to current
2022-09-29	Jacob Lifshay	clean up bigint instruction naming	blob \| commitdiff \| raw \| diff to current
2022-09-28	Luke Kenneth Casso...	new revision of dsld	blob \| commitdiff \| raw \| diff to current
2022-09-28	Luke Kenneth Casso...	add double-sld pseudocode, first draft	blob \| commitdiff \| raw \| diff to current
2022-05-03	Luke Kenneth Casso...	code-comments on madded and divmod2du should say RS...	blob \| commitdiff \| raw \| diff to current
2022-05-03	Luke Kenneth Casso...	properly fix pagereader.py to parse markdown with inden...	blob \| commitdiff \| raw \| diff to current
2022-05-03	Jacob Lifshay	fix syntax error	blob \| commitdiff \| raw \| diff to current
2022-04-29	Luke Kenneth Casso...	higher bits need to be checked for overflow not lower	blob \| commitdiff \| raw \| diff to current
2022-04-29	Luke Kenneth Casso...	invert RC and RA, making divmod2du more like divdu	blob \| commitdiff \| raw \| diff to current
2022-04-27	Luke Kenneth Casso...	accidentally added svfixedarith.mdwn to wiki rather...	blob \| commitdiff \| raw \| diff to current