git.libre-soc.org Git - openpower-isa.git/history - openpower/isatables/RM-1P-2S1D.csv

2022-06-24	Jacob Lifshay	add missed generated csv changes	blob \| commitdiff \| raw
2022-05-02	Luke Kenneth Casso...	re-run sv_analysis to add mode field to csvs	blob \| commitdiff \| raw \| diff to current
2022-01-06	Jacob Lifshay	add grev[w][i] instructions	blob \| commitdiff \| raw \| diff to current
2021-11-12	Jacob Lifshay	change ternaryi to correct register fields	blob \| commitdiff \| raw \| diff to current
2021-11-05	Jacob Lifshay	add ternaryi	blob \| commitdiff \| raw \| diff to current
2021-08-01	Luke Kenneth Casso...	add BCD operations to SVP64	blob \| commitdiff \| raw \| diff to current
2021-07-10	Luke Kenneth Casso...	add ffadds decoding:	blob \| commitdiff \| raw \| diff to current
2021-06-25	Luke Kenneth Casso...	update sv_analysis.py to match new CONDITIONs field...	blob \| commitdiff \| raw \| diff to current
2021-04-23	Luke Kenneth Casso...	add isatables extracted from microwatt and v3.0B spec	blob \| commitdiff \| raw \| diff to current