git.libre-soc.org Git - openpower-isa.git/history - openpower/isatables/RM-1P-3S1D.csv

2022-07-30	Luke Kenneth Casso...	addPack/Unpack to sv_analysis, extra CSV column.	blob \| commitdiff \| raw
2022-06-24	Jacob Lifshay	add missed generated csv changes	blob \| commitdiff \| raw \| diff to current
2022-05-02	Luke Kenneth Casso...	re-run sv_analysis to add mode field to csvs	blob \| commitdiff \| raw \| diff to current
2021-11-17	Jacob Lifshay	rename ternary->ternlog and associated form/field TI...	blob \| commitdiff \| raw \| diff to current
2021-11-12	Jacob Lifshay	change ternaryi to correct register fields	blob \| commitdiff \| raw \| diff to current
2021-07-23	Luke Kenneth Casso...	add sv.fdmadds unit test	blob \| commitdiff \| raw \| diff to current
2021-06-27	Luke Kenneth Casso...	add new (experimental) ffmadds and ffmsubs, for FFT...	blob \| commitdiff \| raw \| diff to current
2021-06-25	Luke Kenneth Casso...	update sv_analysis.py to match new CONDITIONs field...	blob \| commitdiff \| raw \| diff to current
2021-06-15	Luke Kenneth Casso...	fix sv_analysis.py for 3R-1W-CRo case, add fmadds/fmsub...	blob \| commitdiff \| raw \| diff to current
2021-05-18	Luke Kenneth Casso...	add beginning support for SVP64 IEEE754 FP	blob \| commitdiff \| raw \| diff to current
2021-04-23	Luke Kenneth Casso...	add isatables extracted from microwatt and v3.0B spec	blob \| commitdiff \| raw \| diff to current