add very very very basic write-out of instruction log
[openpower-isa.git] / openpower /
2023-05-10 Jacob LifshayMerge branch 'support-fields'
2023-05-10 Jacob Lifshayswitch to using self.FPSCR
2023-05-10 Jacob Lifshayswitch to using FPSCRState for double2single.mdwn
2023-05-09 Jacob Lifshayswitch fpcvt over to using FPSCR attributes
2023-05-07 Dmitry Selyutinminor_19.csv: convert RA to RA0 for minmax
2023-05-05 Jacob Lifshayadd initial fmv/fcvt tests, though they're broken due...
2023-05-05 Jacob Lifshayverify fields.txt forms' field separators ('|') line...
2023-05-04 Konstantinos Marga... merge maddrs/msubrs, unit tests changed accordingly
2023-05-04 Konstantinos Marga... Add 2 more instructions to help with 2-coeff butterfly
2023-05-04 Konstantinos Marga... use a simpler way to do the same thing
2023-05-04 Konstantinos Marga... Handle large 64-bit values, but only the low 64-bit...
2023-05-04 Konstantinos Marga... do proper rounding, no rounding for SH=0 (for now)...
2023-05-04 Konstantinos Marga... Result needs rounding so add +1 to prod*
2023-05-04 Konstantinos Marga... handle negatives correctly by adding sign bit to final...
2023-05-04 Konstantinos Marga... almost there, positive values work, negative values...
2023-05-04 Konstantinos Marga... use proper register sizes
2023-05-04 Konstantinos Marga... MULS instead of MUL, RA instead of RT in in1
2023-05-04 Konstantinos Marga... Turns out DCTI-Form is another variant of A-Form
2023-05-04 Konstantinos Marga... minor fixes in pseudocode, CONST_UI->CONST_SH in minor_...
2023-05-04 Konstantinos Marga... WIP: maddsubrs initial approach
2023-05-04 Jacob Lifshayfix forgotten stuff from last commit
2023-05-04 Jacob Lifshayadd fcvt/fmv -- no tests yet
2023-05-04 Jacob Lifshayadd all fmv*/fcvt* fields
2023-05-04 Jacob Lifshaysplit XO-Form's RA field in prep for adding fcvttg...
2023-05-04 Jacob Lifshaycomment fmin*/fmax* since they're being replaced with...
2023-05-04 Jacob Lifshayupdate SV csvs
2023-04-30 Luke Kenneth Casso... ffnmadds converted to 3-operand
2023-04-30 Luke Kenneth Casso... converted ffnmadds to 3-operand
2023-04-30 Luke Kenneth Casso... ffmsubs number of operands reduced to match ffmadds
2023-04-28 Luke Kenneth Casso... reduce number of operands to ffmadds as well
2023-04-28 Jacob Lifshayprefix-sum remap works!
2023-04-28 Luke Kenneth Casso... reduce fdmadds down to only 3 operands, RT-overwrite...
2023-04-27 Luke Kenneth Casso... add SVSHAPE setup for parallel/prefix but it refuses...
2023-04-25 Luke Kenneth Casso... add CW and CW2 Form
2023-04-25 Jacob Lifshayreplace min/max[su][.] with minmax[.]
2023-04-25 Jacob Lifshayadd unofficial and comment2 columns to minor_19.csv
2023-04-25 Jacob Lifshayadd MM-form
2023-04-21 Jacob Lifshayrewrite all uses of XLCASTU/XLCASTS
2023-04-20 Jacob Lifshayuse proper cast function
2023-04-20 Jacob Lifshaychange XLEN-ification
2023-04-20 Jacob Lifshaychange extsb/h/w to scale based on XLEN rather than...
2023-04-18 Jacob Lifshayadd shaddw
2023-04-18 Jacob Lifshayspelling fix
2023-03-30 Jacob Lifshayfix `neg[o].` causing the simulator to raise TypeError
2023-03-29 Luke Kenneth Casso... remove DCT/iDCT redundant modes which require less...
2023-03-25 Luke Kenneth Casso... update comments on svstep returning pack/unpack state
2023-03-25 Luke Kenneth Casso... updated simplev setvl specification pseudocode: MAJOR...
2023-03-24 Luke Kenneth Casso... whoops added "CRB-Form" format not "CRB"
2023-03-15 Luke Kenneth Casso... add CRB-Form fields for crternlogi and crbinlog, they...
2023-03-08 Luke Kenneth Casso... update pseudocode for dsld/dsrd to note that only when...
2023-01-24 Dmitry Selyutinfields.text: fix TLI XO format
2023-01-24 Dmitry Selyutinbitmanip.mdwn: add missing Rc static operand
2023-01-15 Dmitry Selyutinisatables: split dsld/dsrd Rc versions
2023-01-15 Dmitry Selyutinpower_insn: support tables priorities
2022-11-11 Jacob Lifshayadd maddedus
2022-11-11 Jacob LifshayXLEN-ify maddedu
2022-11-11 Jacob Lifshayfix maddedu title line
2022-11-01 Dmitry Selyutinbitmanip.mdwn: avoid overflow for m variable
2022-11-01 Dmitry SelyutinRevert "Revert "https://bugs.libre-soc.org/show_bug...
2022-11-01 Dmitry SelyutinRevert "corrections to shadd/uw after reverting to...
2022-11-01 Luke Kenneth Casso... corrections to shadd/uw after reverting to switch
2022-11-01 Luke Kenneth Casso... Revert "https://bugs.libre-soc.org/show_bug.cgi?id...
2022-10-28 Luke Kenneth Casso... dsld: MASK(0, 63-n) works just as well as MASK(64,...
2022-10-28 Luke Kenneth Casso... overflow condition in dsld and dsrd if RS is non-zero
2022-10-28 Luke Kenneth Casso... fix dsrd pseudocode to use ROTL64 not ROTL128
2022-10-28 Luke Kenneth Casso... fix dsld pseudocode to use ROTL64 instead of ROTL128
2022-10-28 Jacob Lifshayupdate csvs to match make output
2022-10-28 Luke Kenneth Casso... fix dsrd, ROTL128 use 128-n not 64-n,
2022-10-28 Luke Kenneth Casso... redo sv_analysis for dsld/dsrd
2022-10-28 Luke Kenneth Casso... fix dsrd pseudocode for new 3-in 2-out
2022-10-28 Luke Kenneth Casso... sort out dsld pseudocode, creating mask is tricky
2022-10-28 Luke Kenneth Casso... endeavouring to implement shift-carry-dsld
2022-10-28 Luke Kenneth Casso... redo the 3-in 1-out move of dsld/dsrd to EXT04 VA2...
2022-10-28 Luke Kenneth Casso... first cut pseudocode for dsld/dsrd to be 3-in 1-out,
2022-10-27 Luke Kenneth Casso... https://bugs.libre-soc.org/show_bug.cgi?id=966#c4
2022-10-25 Luke Kenneth Casso... code-comments on divmod2du and maddedu are wrong
2022-10-25 Luke Kenneth Casso... comments
2022-10-25 Luke Kenneth Casso... shadd pseudocode cleanup
2022-10-25 Dmitry Selyutinbitmanip.mdwn: support shadd/shadduw instructions
2022-10-25 Dmitry Selyutinminor_4.csv: support shadd/shadduw instructions
2022-10-24 Luke Kenneth Casso... add maxs. combined with cmp capability
2022-10-22 Luke Kenneth Casso... argh, extremely annoying: 4-operand dsld/dsrd is not...
2022-10-22 Luke Kenneth Casso... bigint shuffle
2022-10-21 Luke Kenneth Casso... use XLEN/2 for ROTL32 in fixedshift.mdwn
2022-10-20 Luke Kenneth Casso... add first chacha20 round test
2022-10-19 Dmitry Selyutinav.mdwn: fix missing bmask operand
2022-10-17 Dmitry Selyutinav.mdwn: fix Rc-augmented cprop instruction
2022-10-14 Luke Kenneth Casso... whoops missed an update MEM(EA...) in pifixedstore
2022-10-14 Luke Kenneth Casso... add sv.stwu/pi example in test_sv_load_store_postinc
2022-10-11 Luke Kenneth Casso... whoops ea not ra in pifixedstore.mdwn
2022-10-11 Luke Kenneth Casso... add Post-increment version of fixedstore.mdwn
2022-10-11 Luke Kenneth Casso... add experimental post-increment fixedload pseudocode
2022-10-10 Luke Kenneth Casso... add elwidth overrides on Indexed REMAP, 8-bit example...
2022-10-08 Luke Kenneth Casso... add rfscv to major_19.csv, add test_pysvp64dis.py unit...
2022-10-08 Luke Kenneth Casso... add sc and scv support after moving from major.csv...
2022-10-08 Luke Kenneth Casso... add stq to CSV files and unit test to test_pysvp64dis.py
2022-10-08 Luke Kenneth Casso... add lq and CONST_DQ
2022-10-08 Luke Kenneth Casso... add CY operand to fields.txt, in Z23-Form
2022-10-08 Luke Kenneth Casso... add addex to csv and sv_analysis db. also needs CryIn...
2022-10-08 Luke Kenneth Casso... misnamed instruction, lfiwzx
next