radeon: enable Hyper-Z on r600g and radeonsi by default
[mesa.git] / src / gallium / drivers / nouveau / codegen / nv50_ir_target_nvc0.cpp
2014-09-09 Ilia Mirkinnv50/ir: avoid array overrun when checking for supporte...
2014-05-28 Alexandre Courbotnvc0/ir: use SM35 ISA with GK20A
2014-05-14 Ben Skeggsnvc0: maxwell isa has no per-instruction join modifier
2014-05-14 Ben Skeggsnvc0: allow for easier modification of compiler library...
2014-04-28 Ilia Mirkinnvc0/ir: add support for new bitfield manipulation...
2014-04-26 Ilia Mirkinnvc0/ir: add support for SAMPLEMASK sysval
2014-04-26 Ilia Mirkinnvc0: add support for PIPE_CAP_SAMPLE_SHADING
2014-03-18 Ilia Mirkinnv50/ir/gk110: add 64/128-bit fetch/export support
2013-12-06 Ben Skeggsnvc0: fixup gk110 and up not being listed in various...
2013-09-11 Johannes ObermayrMove nv30, nv50 and nvc0 to nouveau.