fix setvl. not setting CR0 properly
[openpower-isa.git] / src / openpower / decoder / isa /
2022-08-26 Jacob Lifshayfix setvl. not setting CR0 properly
2022-08-25 Jacob Lifshaymark all known-broken tests so CI passes
2022-08-25 Jacob Lifshayconvert all test_caller*.py to work with pytest/unittes...
2022-08-25 Jacob Lifshayfix deprecated imports
2022-08-25 Jacob Lifshaychange test cases to use TestRunnerBase in order to...
2022-08-24 Jacob Lifshayworking on svp64 utf-8 validation -- still broken
2022-08-24 Jacob Lifshaymisc cleanup
2022-08-24 Jacob Lifshayfinished writing svp64 utf-8 validation algorithm ...
2022-08-15 Luke Kenneth Casso... codeshuffle
2022-08-15 Luke Kenneth Casso... swap complicated bits, simplify ISACaller, reduce inden...
2022-08-15 Luke Kenneth Casso... debug print for ISACaller pack/unpack
2022-08-14 Luke Kenneth Casso... dang missed *another* argument in ISACaller on the...
2022-08-14 Luke Kenneth Casso... remove LD/ST-shift mode from ISACaller
2022-08-12 Luke Kenneth Casso... remove use of sv ld shifted, replace with els, deprecat...
2022-08-12 Luke Kenneth Casso... remove use of sv.lfssh, deprecate the unit test
2022-08-12 Luke Kenneth Casso... remove use of sv.lfssh, replace with sv.lfs/els element...
2022-08-12 Luke Kenneth Casso... remove use of sv.lfssh, replace with sv.lfs/els element...
2022-07-31 Luke Kenneth Casso... whoops should be True
2022-07-31 Luke Kenneth Casso... whoops initialise nia_update to False
2022-07-30 Luke Kenneth Casso... add README in ISA sim directory
2022-07-30 Luke Kenneth Casso... fix LDST immed using EXTRA2 not EXTRA3 in tests to...
2022-07-30 Luke Kenneth Casso... sigh begin process of fixing unit tests which are no...
2022-07-27 Konstantinos Marga... Add fishmv instruction (bug #887)
2022-07-26 Konstantinos Marga... Add fmvis instruction + tests, bug #887
2022-07-21 Luke Kenneth Casso... whoops missing variables in new subfunction after
2022-07-21 Luke Kenneth Casso... add dsubstep to ISACaller
2022-07-21 Luke Kenneth Casso... sort out subvl unit test with expected results
2022-07-21 Luke Kenneth Casso... fix loopend conditions for subvectors in ISACaller
2022-07-20 Luke Kenneth Casso... rename substep to ssubstep, add dsubstep to SVP64State
2022-07-20 Luke Kenneth Casso... add first subvl unit test, subvl comes from
2022-07-18 Luke Kenneth Casso... move D-Immediate rewriting in ISACaller into separate...
2022-07-18 Luke Kenneth Casso... move inputs in ISACaller into get_input()
2022-07-18 Luke Kenneth Casso... move debug remap to ISACaller.remap_debug()
2022-07-18 Luke Kenneth Casso... whitespace and function-return code-morphing in ISACaller
2022-07-18 Luke Kenneth Casso... move another function in ISACaller (check_write)
2022-07-18 Luke Kenneth Casso... begin function split in ISACaller
2022-07-18 Luke Kenneth Casso... remove duplicate code create ISACaller.advance_svstate_...
2022-07-18 Luke Kenneth Casso... add SUBVL (substep) support to PowerDecoder2 and to...
2022-07-18 Luke Kenneth Casso... add substep getter/setter to SVP64State
2022-07-16 Luke Kenneth Casso... simplify remapyield.py, skip shows the bit to be skipped
2022-07-14 Luke Kenneth Casso... got fed up of long list of ifs for manually decoded...
2022-07-11 Luke Kenneth Casso... add mm=1 svindex test, setting single targetted SVSHAPE
2022-07-10 Luke Kenneth Casso... add yx svindex test, needed to compute size of 2nd dim
2022-07-10 Luke Kenneth Casso... Indexed SVSHAPE add bypass mode when dim sizes are 1
2022-07-10 Luke Kenneth Casso... add second svindex test, modulo 3
2022-07-10 Luke Kenneth Casso... fix svindex unit test, experiment setting dimensions
2022-07-10 Luke Kenneth Casso... fix SVSHAPE iterator for index case, stop deepcopy
2022-07-10 Luke Kenneth Casso... add new svindex sv.add test with arbitrary index map
2022-07-10 Luke Kenneth Casso... non-persistence enabled on svindex as well as svremap
2022-07-10 Luke Kenneth Casso... fix svindex pseudocode
2022-07-09 Luke Kenneth Casso... pass GPR to SVSHAPEs in ISACaller
2022-07-09 Luke Kenneth Casso... add gpr lookup in Indexed SVSHAPE iterator (no elwidths...
2022-07-09 Luke Kenneth Casso... rough unit test ahowing Index REMAP basically functiona...
2022-07-09 Luke Kenneth Casso... add support for Indexed mode in SVSHAPE
2022-07-06 Luke Kenneth Casso... add first stub of svindex pseudocode
2022-07-06 Luke Kenneth Casso... convert Logical svp64_cases.py to new vector reg form
2022-07-06 Luke Kenneth Casso... convert ALU svp64_cases.py to new vector reg form
2022-07-06 Luke Kenneth Casso... converted test_caller_svstate.py to new reg format
2022-07-05 Andrey Miroshnikovconvert test_caller_svp64.py to new vector numbering...
2022-07-05 Andrey Miroshnikovconvert test_caller_svp64_predication.py to new vector...
2022-07-05 Andrey Miroshnikovconvert test_caller_svp64_ldst.py to new vector numberi...
2022-07-05 Andrey MiroshnikovUpdated the nmigen.sim import
2022-07-05 Andrey Miroshnikovconvert test_caller_svp64_fft.py to new vector numberin...
2022-07-05 Andrey Miroshnikovconvert test_caller_svp64_bc.py to new vector numbering...
2022-07-05 Andrey Miroshnikovconvert test_caller_svp64_dct.py to new vector numberin...
2022-07-05 Luke Kenneth Casso... converted test_caller_svp64_matrix.py to new reg format
2022-07-05 Luke Kenneth Casso... converted test_caller_svp64_fp.py to new reg format
2022-07-05 Luke Kenneth Casso... converted test_caller_svp64_mapreduce.py to new reg...
2022-07-05 Luke Kenneth Casso... convert test_caller_setvl.py to new vector numbering...
2022-07-02 Luke Kenneth Casso... add setvl CTR tests, fix CTR mode
2022-07-02 Luke Kenneth Casso... setvl has new CTR mode, making room in encoding needed
2022-06-26 Luke Kenneth Casso... add predicate mask test svstep
2022-06-26 Luke Kenneth Casso... add predicated srcstep
2022-06-26 Luke Kenneth Casso... make svstep output srcstep/dststep, basically viota
2022-06-26 Luke Kenneth Casso... again fix number of arguments to svremap,
2022-06-26 Luke Kenneth Casso... test_caller_svstate.py: end-of-loop condition sets...
2022-06-26 Luke Kenneth Casso... svp64_matrix.py svremap reduce to 7 args from 8 (again)
2022-06-26 Luke Kenneth Casso... svremap only takes 7 args not 8, same as in svp64_fft.py
2022-06-26 Luke Kenneth Casso... one too many arguments to svremap in svp64_fft.py test
2022-06-26 Luke Kenneth Casso... whoops hack-use of DOUBLE2SINGLE in test_caller_transce...
2022-06-26 Luke Kenneth Casso... add test case for kaivb to jump to 0x2700
2022-06-23 Andrey MiroshnikovAdded bmask, pywriter failing
2022-06-22 Andrey MiroshnikovAdded cprop to caller, enums, svp64
2022-06-20 Luke Kenneth Casso... add absolute-signed-diff next to absolute-unsigned...
2022-06-20 Luke Kenneth Casso... rename absadd[us] to absdac[ud]
2022-06-19 Jacob Lifshayupdate after adding av instructions
2022-06-19 Luke Kenneth Casso... add absadd (unsigned) DRAFT
2022-06-19 Luke Kenneth Casso... add absolute-difference DRAFT
2022-06-19 Luke Kenneth Casso... add average-add DRAFT pseudocode and CSV
2022-06-19 Luke Kenneth Casso... add maxs DRAFT instruction
2022-05-03 Jacob Lifshayadd Rc to ternlogi
2022-05-03 Jacob Lifshayformat code
2022-05-03 Jacob Lifshayadd svfixedarith.py to .gitignore
2022-04-20 Dmitry Selyutinselectable_int: derive SelectableIntMapping on per...
2022-04-20 Dmitry Selyutinisa.caller: support default SVP64PrefixFields initializ...
2022-04-19 Dmitry Selyutinisa.caller: support whole integer pseudo-field
2022-04-19 Dmitry Selyutinisa.caller: refactor SVP64PrefixFields class
2022-04-19 Dmitry Selyutinisa.caller: refactor SVP64RMFields class
2022-04-07 Luke Kenneth Casso... whitespace (80 char limit)
2022-04-07 Luke Kenneth Casso... comment 64-bit of predicate (all 1s)
next