bug #672: invert testing in sv.minmax and add Rc=1
[openpower-isa.git] / src / openpower / decoder / power_svp64_rm.py
2023-06-02 Dmitry Selyutinpower_insn: decouple into separate module
2023-05-21 Luke Kenneth Casso... add /pi to LD/ST, temporarily. lose dz/sz replace with...
2023-05-21 Luke Kenneth Casso... big set of updates to LD/ST in line with new spec changes
2023-05-17 Luke Kenneth Casso... update the tables in power_svp64_rm.py
2023-05-17 Luke Kenneth Casso... sorted SVP64RMModeDecode to properly match the new...
2023-05-15 Luke Kenneth Casso... fix empty slot in EXTRA
2023-04-06 Luke Kenneth Casso... add power_decode_svp64_rm.py capability for new LD...
2023-01-15 Dmitry Selyutinpower_enums: clean code
2022-10-14 Luke Kenneth Casso... SVP64RMModeDecode detects Post-Inc LDST-imm mode
2022-10-06 Luke Kenneth Casso... sort out CROPs fail-first in ISACaller. needed to...
2022-10-06 Luke Kenneth Casso... starting to add sv.cmp support and failfirst, had to add
2022-09-24 Luke Kenneth Casso... add RC1 support to ISACaller.
2022-09-23 Luke Kenneth Casso... add data-dependent fail-first mode, Rc=1 variant not...
2022-09-20 Dmitry Selyutinpower_svp64_rm: sync it with tables
2022-09-18 Luke Kenneth Casso... add first attempt at swapping inner/outer vl/subvl...
2022-09-13 Luke Kenneth Casso... remove pack/unpack from SVP64RMModeDecode, it is now...
2022-09-05 Luke Kenneth Casso... remove parallel-reduction mode from decoder and sv...
2022-09-05 Luke Kenneth Casso... rename "PARALLEL" enums to "PTREDUCE" - parallel tree...
2022-09-04 Luke Kenneth Casso... add detection of Parallel-Reduction Mode into SVP64RMMo...
2022-08-15 Luke Kenneth Casso... extract pack/unpack as separate bits, and also do elwid...
2022-08-14 Luke Kenneth Casso... go with separate bit for Pack/Unpack mode in SVP64RMMod...
2022-08-14 Luke Kenneth Casso... add PACK/UNPACK Mode descriptions to power_svp64_rm.py
2021-09-04 Luke Kenneth Casso... redo SVP64 RM Decode to new CTR-Test Mode (svstep not...
2021-08-11 Luke Kenneth Casso... corrections to SVP64 Branch Conditional
2021-08-10 Luke Kenneth Casso... corrections to SVP64 Branch RM Mode decoding
2021-08-08 Luke Kenneth Casso... add SVP64 Branch-Conditional decoding
2021-08-05 Luke Kenneth Casso... start adding Branch-Conditional decoding to SVP64RMMode...
2021-08-01 Luke Kenneth Casso... bit of a big update, remove all bit-reversed LD operati...
2021-06-23 Luke Kenneth Casso... add start of bit-reverse mode for LD/ST to SVP64 encode...
2021-06-19 Luke Kenneth Casso... add mapreduce "reverse gear" unit tests
2021-06-19 Luke Kenneth Casso... add decode of "reverse gear" in SVP64 reduce mode
2021-05-30 Luke Kenneth Casso... add "normal" element-strided LD/ST decode/support to...
2021-05-29 Luke Kenneth Casso... comments
2021-05-29 Luke Kenneth Casso... extract LDST mode from SVP64 RM
2021-05-29 Luke Kenneth Casso... add SVP64 RM LDST mode enum
2021-05-05 Luke Kenneth Casso... add saturate SVP64 RM mode decode
2021-05-05 Luke Kenneth Casso... move SVP64 RM mode decoder into PowerDecodeSubset
2021-05-05 Luke Kenneth Casso... add sv_input_record_layout to match SVP64RMModeDecode
2021-04-23 Luke Kenneth Casso... resolving imports changing over
2021-04-23 Luke Kenneth Casso... add first openpower decoder files, copied from soc...