add vec2/3/4 test_pysvp64dis test
[openpower-isa.git] / src / openpower / decoder /
2022-09-16 Dmitry Selyutintest_power_decoder: mark minor_19.csv as opint
2022-09-16 Dmitry Selyutinselectable_int: replace bit_count with bit_length
2022-09-16 Dmitry Selyutinpower_insn: postpone updating per-instruction operands
2022-09-15 Dmitry Selyutinpower_insn: perform faster PPC database lookups
2022-09-15 Dmitry Selyutinpower_insn: support instruction bytes conversion
2022-09-15 Dmitry Selyutinselectable_int: allow setting multiple bit
2022-09-15 Dmitry Selyutinpower_insn: allow accessing instruction bits
2022-09-15 Luke Kenneth Casso... fix sprset mtspr/mfspr pseudocode with wrong definition of
2022-09-14 Jacob Lifshayadd svp64 fptrans tests
2022-09-14 Jacob Lifshayfix some typos
2022-09-13 Dmitry Selyutinpower_insn: support signed operands
2022-09-13 Dmitry Selyutinpower_insn: support branch RM
2022-09-13 Dmitry Selyutinpower_insn: support CR RM
2022-09-13 Dmitry Selyutinpower_enums: convert SVExtra to RegType
2022-09-13 Dmitry Selyutinpower_insn: refactor RM mapping
2022-09-13 Jacob Lifshayadd new fptrans unit tests
2022-09-13 Jacob Lifshayadd fptrans support to isa caller
2022-09-13 Jacob Lifshayadd fp support to TestRunnerBase
2022-09-13 Luke Kenneth Casso... add first pack/unpack to ISACaller
2022-09-13 Luke Kenneth Casso... add setter/getter properties to SVP64State, minor code...
2022-09-13 Luke Kenneth Casso... remove pack/unpack from SVP64RMModeDecode, it is now...
2022-09-12 Dmitry Selyutinpower_insn: refactor RM mapping
2022-09-12 Dmitry Selyutinpower_insn: call sv_spec_leave unconditionally
2022-09-12 Dmitry Selyutinpower_enums: consider CRIn2Sel
2022-09-12 Dmitry Selyutinpower_insn: fix RCOE check
2022-09-12 Dmitry Selyutinpower_insn: introduce pseudo cr_in2
2022-09-12 Dmitry Selyutinpower_enums: strict selectors conversion
2022-09-12 Dmitry Selyutinpower_insn: fix typo
2022-09-12 Dmitry Selyutinpower_insn: support BRANCH and CR mode stubs
2022-09-12 Dmitry Selyutinpower_insn: refactor register operands
2022-09-12 Jacob Lifshayadd fptrans helpers, switching existing uses to new...
2022-09-12 Luke Kenneth Casso... add rudimentary sv.setvl unit test to just check that...
2022-09-11 Luke Kenneth Casso... add new CRIn2Sel for later, for getting rid of CRInSel...
2022-09-11 Luke Kenneth Casso... BFT does not exist
2022-09-11 Dmitry Selyutinpower_insn: check exact matches directly in set
2022-09-11 Dmitry Selyutinpower_insn: group opcodes and names
2022-09-11 Luke Kenneth Casso... add missing addpcis to power_enums.py and minor_19.csv
2022-09-11 Luke Kenneth Casso... convert minor_19 to bitpattern (for adding addpcis)
2022-09-11 Luke Kenneth Casso... whoops lsbshf=2 for CR5
2022-09-11 Luke Kenneth Casso... whoops missed lsb-shift parameter
2022-09-11 Luke Kenneth Casso... add comments into CR5Operand class
2022-09-11 Luke Kenneth Casso... add CR5Operand and CR3Operand to power_insns.py
2022-09-10 Dmitry Selyutinpower_insn: perform minor opcodes cleanup
2022-09-10 Dmitry Selyutinpower_insn: hopefully final take on the opcodes
2022-09-10 Dmitry Selyutinpower_insn: yet another take on the opcodes
2022-09-10 Luke Kenneth Casso... whitespace cleanup
2022-09-10 Luke Kenneth Casso... add quine-mckluskey algorithm
2022-09-10 Dmitry Selyutinpower_insn: refactor register verbose assembly
2022-09-10 Dmitry Selyutinpower_insn: support pcode
2022-09-10 Dmitry Selyutinpower_insn: tune TargetAddrOperand disassembly
2022-09-10 Dmitry Selyutinpower_insn: support CR remap
2022-09-10 Dmitry Selyutinpower_insn: support non-zero operands
2022-09-10 Dmitry Selyutinpower_insn: simplify operand naming conventions
2022-09-10 Dmitry Selyutinpower_insn: drop redundant dataclass incantations
2022-09-10 Dmitry Selyutinpower_insn: do not print blob suffix unless needed
2022-09-10 Dmitry Selyutinpower_insn: do not panic upon database query
2022-09-10 Dmitry Selyutinpower_insn: refactor opcode matching
2022-09-10 Dmitry Selyutinpower_insn: support D operand in DX form
2022-09-10 Dmitry Selyutinpower_insn: refactor span detection
2022-09-10 Dmitry Selyutinpower_insn: simplify code
2022-09-10 Dmitry Selyutinpower_insn: remove redundant code
2022-09-10 Dmitry Selyutinpower_insn: decouple extra merge routine
2022-09-10 Dmitry Selyutinpower_insn: rename extra to spec
2022-09-10 Dmitry Selyutinpower_insn: deprecate redundant else section
2022-09-10 Dmitry Selyutinpower_insn: rename Extra classes
2022-09-10 Jacob Lifshaymove ffadds to not conflict with fptrans -- makes space...
2022-09-09 Dmitry Selyutinpower_insn: support verbosity levels
2022-09-09 Dmitry Selyutinpower_insn: indent refactoring
2022-09-09 Luke Kenneth Casso... extend short down into rest of disassembly
2022-09-09 Luke Kenneth Casso... add "short" form of instruction - not output hex-encoding
2022-09-08 Dmitry Selyutinsvshape2: rename fields
2022-09-07 Dmitry Selyutinpower_insn: dump operand type (scalar/vector)
2022-09-07 Luke Kenneth Casso... add fcpsgn parallel reduction test
2022-09-07 Luke Kenneth Casso... whoops forgot to strip "NN/NN=insn" in power_svp64.py
2022-09-07 Luke Kenneth Casso... add 2nd parallel prefix test, this time subtract (non...
2022-09-07 Dmitry Selyutinpower_insn: fix immediate operands
2022-09-07 Dmitry Selyutinpower_insn: refactor operands disassembly
2022-09-07 Dmitry Selyutinpower_fields: deprecate arrays
2022-09-07 Dmitry Selyutinpower_insn: support EXTRA2/EXTRA3 GPR/FPR
2022-09-06 Dmitry Selyutinpower_fields: allow getting individual field bits
2022-09-06 Dmitry Selyutinpower_insn: use tuple for bit ranges in fields
2022-09-06 Dmitry Selyutinpower_insn: fix naming conventions
2022-09-06 Dmitry Selyutinpower_insn: stricter reg type check
2022-09-06 Luke Kenneth Casso... add first functional confirmed unit test for parallel...
2022-09-06 Luke Kenneth Casso... REMAP parallel-reduce:
2022-09-06 Jacob Lifshayadd fixedsync.py to .gitignore
2022-09-06 Dmitry Selyutinpower_insn: rename value argument to insn in operands
2022-09-06 Dmitry Selyutinpower_insn: support branch stub
2022-09-06 Dmitry Selyutinpower_insn: clean extra disassembly
2022-09-06 Dmitry Selyutinpower_enum: tune SVPtype representation
2022-09-06 Dmitry Selyutinpower_enum: tune SVEtype representation
2022-09-06 Dmitry Selyutinpower_insn: disassemble extra index
2022-09-06 Dmitry Selyutinpower_enum: tune SVExtra representation
2022-09-06 Dmitry Selyutinpower_insn: support extra_reg routine
2022-09-06 Dmitry Selyutinpower_insn: move extras to SVP64Record
2022-09-06 Luke Kenneth Casso... sort out demo of remap_preduce_yield.py
2022-09-06 Luke Kenneth Casso... add first version of parallel reduction yield
2022-09-05 Luke Kenneth Casso... use log function for warnings about .mdwn files in...
2022-09-05 Luke Kenneth Casso... remove parallel-reduction mode from decoder and sv...
2022-09-05 Luke Kenneth Casso... rename remap_debug to remap_set_steps
next