power_insn: support EXTRA2/EXTRA3 GPR/FPR
[openpower-isa.git] / src / openpower / decoder /
2022-09-07 Dmitry Selyutinpower_insn: support EXTRA2/EXTRA3 GPR/FPR
2022-09-06 Dmitry Selyutinpower_fields: allow getting individual field bits
2022-09-06 Dmitry Selyutinpower_insn: use tuple for bit ranges in fields
2022-09-06 Dmitry Selyutinpower_insn: fix naming conventions
2022-09-06 Dmitry Selyutinpower_insn: stricter reg type check
2022-09-06 Luke Kenneth Casso... add first functional confirmed unit test for parallel...
2022-09-06 Luke Kenneth Casso... REMAP parallel-reduce:
2022-09-06 Jacob Lifshayadd fixedsync.py to .gitignore
2022-09-06 Dmitry Selyutinpower_insn: rename value argument to insn in operands
2022-09-06 Dmitry Selyutinpower_insn: support branch stub
2022-09-06 Dmitry Selyutinpower_insn: clean extra disassembly
2022-09-06 Dmitry Selyutinpower_enum: tune SVPtype representation
2022-09-06 Dmitry Selyutinpower_enum: tune SVEtype representation
2022-09-06 Dmitry Selyutinpower_insn: disassemble extra index
2022-09-06 Dmitry Selyutinpower_enum: tune SVExtra representation
2022-09-06 Dmitry Selyutinpower_insn: support extra_reg routine
2022-09-06 Dmitry Selyutinpower_insn: move extras to SVP64Record
2022-09-06 Luke Kenneth Casso... sort out demo of remap_preduce_yield.py
2022-09-06 Luke Kenneth Casso... add first version of parallel reduction yield
2022-09-05 Luke Kenneth Casso... use log function for warnings about .mdwn files in...
2022-09-05 Luke Kenneth Casso... remove parallel-reduction mode from decoder and sv...
2022-09-05 Luke Kenneth Casso... rename remap_debug to remap_set_steps
2022-09-05 Luke Kenneth Casso... please do not use format-specifiers
2022-09-05 Luke Kenneth Casso... remove yet more f"" specifiers
2022-09-05 Luke Kenneth Casso... removing use of format. please do not use format
2022-09-05 Luke Kenneth Casso... rename "PARALLEL" enums to "PTREDUCE" - parallel tree...
2022-09-04 Luke Kenneth Casso... add detection of Parallel-Reduction Mode into SVP64RMMo...
2022-09-04 Dmitry Selyutinpower_insn: support mode description
2022-09-04 Dmitry Selyutinpower_insn: decouple mode function
2022-09-04 Dmitry Selyutinpower_insn: pass database instance everywhere
2022-09-04 Dmitry Selyutinpower_insn: refactor operation order
2022-09-04 Luke Kenneth Casso... whoops forgot to write maxvl in PowerDecoder2
2022-09-04 Dmitry Selyutinpower_insn: drop argument in PPCDatabase
2022-09-04 Dmitry Selyutinpower_table: replace prints with logging
2022-09-04 Dmitry Selyutinpower_table: simplify the code
2022-09-04 Dmitry Selyutinpower_insn: inherit PPCMultiRecord from frozenset
2022-09-04 Dmitry Selyutinpower_insn: try exact name matching first
2022-09-04 Luke Kenneth Casso... use maxvl not vl in impicit-RS
2022-09-04 Dmitry Selyutinpower_insn: remove the whitespaces properly
2022-09-04 Luke Kenneth Casso... whitespace cleanup
2022-09-04 Luke Kenneth Casso... comments on ffmadds fft 3-in 2-out
2022-09-04 Luke Kenneth Casso... assert prints out XO
2022-09-04 Luke Kenneth Casso... more comments
2022-09-04 Dmitry Selyutinpower_insn: refactor immediate operands
2022-09-04 Dmitry Selyutinpower_insn: inherit Operands from tuple
2022-09-04 Luke Kenneth Casso... code-cleanup (comments) and rename "i" to "XO"
2022-09-04 Dmitry Selyutinpower_insn: support immediate operands
2022-09-04 Dmitry Selyutinpower_insn: make operand classes public
2022-09-04 Dmitry Selyutinpower_insn: switch back to target_addr
2022-09-04 Jacob Lifshayreallocate opcodes for ffadds (converted to X-FORM...
2022-09-04 Luke Kenneth Casso... clear up assert, clean up table columns
2022-09-04 Luke Kenneth Casso... fix power_table.py to use multi-entries
2022-09-03 Dmitry Selyutinpower_insn: support SVP64 verbose mode
2022-09-03 Dmitry Selyutinpower_insn: refactor verbose output
2022-09-03 Dmitry Selyutinpower_insn: support verbose binary
2022-09-03 Dmitry Selyutinpower_insn: support PPC multi-records
2022-09-03 Dmitry Selyutinpower_insn: update disassembly target_addr
2022-09-03 Dmitry Selyutinpower_insn: support verbose disassembly mode
2022-09-03 Dmitry Selyutinpower_insn: implement mode decoding
2022-09-03 Dmitry Selyutinpower_insn: support Rc detection
2022-09-03 Dmitry Selyutinpower_insn: drop pack/unpack bit
2022-09-03 Dmitry Selyutinpower_insn: rename normal field to simple
2022-09-03 Dmitry Selyutinpower_insn: decouple IMM/IDX LD/ST modes
2022-09-03 Dmitry Selyutinpower_insn: support operands check
2022-09-03 Dmitry Selyutinpower_insn: canonicalize Rc field name
2022-09-03 Dmitry Selyutinpower_insn: support mode selector
2022-09-03 Dmitry Selyutinpower_insn: support normal mode
2022-09-03 Dmitry Selyutinpower_insn: support LD/ST indexed mode
2022-09-03 Dmitry Selyutinpower_insn: simplify fields
2022-09-03 Dmitry Selyutinpower_insn: decrease LDSTMode class nesting
2022-09-03 Dmitry Selyutinpower_insn: support LD/ST immediate mode
2022-09-03 Dmitry Selyutinpower_insn: make RM class public
2022-09-03 Dmitry Selyutinpower_insn: remap RM immediately
2022-09-03 Dmitry Selyutinpower_fields: allow slicing mappings
2022-09-03 Dmitry Selyutinpower_fields: allow slicing fields
2022-09-03 Dmitry Selyutinpower_fields: create arrays from Array class
2022-09-03 Luke Kenneth Casso... create list of opcodes by dict entry
2022-09-03 Luke Kenneth Casso... correct table header
2022-09-03 Luke Kenneth Casso... use opcode directly
2022-09-03 Luke Kenneth Casso... divpoint 2 to match v3.1
2022-09-03 Luke Kenneth Casso... create correct divpoint to make match against v3.0...
2022-09-03 Luke Kenneth Casso... complete markdown table
2022-09-03 Luke Kenneth Casso... correct table-matching
2022-09-03 Luke Kenneth Casso... enumeration almost there
2022-09-03 Luke Kenneth Casso... MSB0-order, xomask 31-start
2022-09-03 Luke Kenneth Casso... add power_table.py start of creating markdown Appendix...
2022-09-03 Luke Kenneth Casso... add svshape2 offset test demonstrating RA being offset...
2022-09-03 Luke Kenneth Casso... Revert "add inv option to svshape2 (only 1 bit)"
2022-09-03 Luke Kenneth Casso... add inv option to svshape2 (only 1 bit)
2022-09-03 Luke Kenneth Casso... update sv_analysis to create separate SVMode.LDST_IDX...
2022-09-03 Jacob Lifshayfix test_caller_svshape2.py
2022-09-03 Jacob Lifshayformat code
2022-09-02 Luke Kenneth Casso... add test_caller_svshape2.py and make corrections to...
2022-09-02 Luke Kenneth Casso... add svshape2 to ISACaller
2022-09-02 Luke Kenneth Casso... add svshape2 to list of instructions in power_enums.py
2022-09-02 Luke Kenneth Casso... add svshape2 (stub pseudocode) fields, Form, and CSV...
2022-09-02 Luke Kenneth Casso... shuffle down numbering after SVM to make room for SVM2
2022-09-02 Luke Kenneth Casso... add fix of out_sel in power_decoder.py formal proof
2022-09-02 Luke Kenneth Casso... fix RCOE.RC_ONLY in formal test_decoder2.py
2022-09-02 Dmitry Selyutinpower_insn: drop custom Record representation
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