fix setvl. not setting CR0 properly
[openpower-isa.git] / src / openpower / decoder /
2022-08-26 Jacob Lifshayfix setvl. not setting CR0 properly
2022-08-25 Jacob Lifshaymark all known-broken tests so CI passes
2022-08-25 Jacob Lifshayallow crtl tests to run in parallel
2022-08-25 Jacob Lifshayadd XFAIL because the file improperly accesses pdecode2...
2022-08-25 Jacob Lifshayadd missing on_SmtExpr methods
2022-08-25 Jacob Lifshayconvert all test_caller*.py to work with pytest/unittes...
2022-08-25 Jacob Lifshayfix deprecated imports
2022-08-25 Jacob Lifshaychange test cases to use TestRunnerBase in order to...
2022-08-24 Jacob Lifshayworking on svp64 utf-8 validation -- still broken
2022-08-24 Jacob Lifshaymisc cleanup
2022-08-24 Jacob Lifshayfinished writing svp64 utf-8 validation algorithm ...
2022-08-18 Luke Kenneth Casso... use bitpattern in minor_30.csv to give a single match for
2022-08-17 Dmitry Selyutinpower_insn: support function property
2022-08-17 Dmitry Selyutinpower_insn: fix sv_extra algorithm
2022-08-17 Dmitry Selyutinpower_enums: fix conversion from selector to reg
2022-08-17 Luke Kenneth Casso... again part of the removal of LD/ST-with-shift, take out
2022-08-15 Luke Kenneth Casso... codeshuffle
2022-08-15 Luke Kenneth Casso... swap complicated bits, simplify ISACaller, reduce inden...
2022-08-15 Luke Kenneth Casso... debug print for ISACaller pack/unpack
2022-08-15 Luke Kenneth Casso... extract pack/unpack as separate bits, and also do elwid...
2022-08-14 Luke Kenneth Casso... dang missed *another* argument in ISACaller on the...
2022-08-14 Dmitry Selyutinpower_insn.py: introduce instruction database
2022-08-14 Dmitry Selyutinpower_enums: map in/out to extra
2022-08-14 Dmitry Selyutinpower_enums: introduce SVMode enum
2022-08-14 Dmitry Selyutinpower_enums: introduce SVExtraReg enum
2022-08-14 Dmitry Selyutinpower_enums: introduce SVExtraRegType enum
2022-08-14 Dmitry Selyutinpower_enums: introduce SVExtra alias
2022-08-14 Dmitry Selyutinpower_enums: introduce RegType enum
2022-08-14 Dmitry Selyutinpower_enums: allow SVPtype aliases
2022-08-14 Dmitry Selyutinpower_enums: better repr for Function enum
2022-08-14 Dmitry Selyutinpower_enums: introduce LDSTLen alias class
2022-08-14 Dmitry Selyutinpower_enums: introduce base enum class
2022-08-14 Luke Kenneth Casso... go with separate bit for Pack/Unpack mode in SVP64RMMod...
2022-08-14 Luke Kenneth Casso... remove LD/ST-shift mode from ISACaller
2022-08-14 Luke Kenneth Casso... add PACK/UNPACK Mode descriptions to power_svp64_rm.py
2022-08-12 Luke Kenneth Casso... remove LDSTBREV condition, used for ld-st-with-shift
2022-08-12 Luke Kenneth Casso... remove use of sv ld shifted, replace with els, deprecat...
2022-08-12 Luke Kenneth Casso... remove use of sv.lfssh, deprecate the unit test
2022-08-12 Luke Kenneth Casso... remove use of sv.lfssh, replace with sv.lfs/els element...
2022-08-12 Luke Kenneth Casso... remove use of sv.lfssh, replace with sv.lfs/els element...
2022-08-09 Dmitry Selyutinpower_enums: add missing forms
2022-07-31 Luke Kenneth Casso... whoops should be True
2022-07-31 Luke Kenneth Casso... whoops initialise nia_update to False
2022-07-30 Luke Kenneth Casso... add README in ISA sim directory
2022-07-30 Luke Kenneth Casso... fix LDST immed using EXTRA2 not EXTRA3 in tests to...
2022-07-30 Luke Kenneth Casso... sigh begin process of fixing unit tests which are no...
2022-07-28 Jacob LifshayDOUBLE2SINGLE: convert doc comments to docstring
2022-07-28 Jacob Lifshayre-convert frsp pseudocode
2022-07-28 Jacob Lifshaytry to add some line numbers to ast -- helps with debugging
2022-07-28 Jacob Lifshayswitch ast for assignment to tuple to use the python...
2022-07-28 Jacob Lifshayfix line number tracking
2022-07-27 Konstantinos Marga... Add fishmv instruction (bug #887)
2022-07-26 Konstantinos Marga... Add fmvis instruction + tests, bug #887
2022-07-21 Luke Kenneth Casso... whoops missing variables in new subfunction after
2022-07-21 Luke Kenneth Casso... add dsubstep to ISACaller
2022-07-21 Luke Kenneth Casso... sort out subvl unit test with expected results
2022-07-21 Luke Kenneth Casso... fix loopend conditions for subvectors in ISACaller
2022-07-20 Luke Kenneth Casso... rename substep to ssubstep, add dsubstep to SVP64State
2022-07-20 Luke Kenneth Casso... add first subvl unit test, subvl comes from
2022-07-18 Luke Kenneth Casso... move D-Immediate rewriting in ISACaller into separate...
2022-07-18 Luke Kenneth Casso... move inputs in ISACaller into get_input()
2022-07-18 Luke Kenneth Casso... move debug remap to ISACaller.remap_debug()
2022-07-18 Luke Kenneth Casso... whitespace and function-return code-morphing in ISACaller
2022-07-18 Luke Kenneth Casso... move another function in ISACaller (check_write)
2022-07-18 Luke Kenneth Casso... begin function split in ISACaller
2022-07-18 Luke Kenneth Casso... remove duplicate code create ISACaller.advance_svstate_...
2022-07-18 Luke Kenneth Casso... add SUBVL (substep) support to PowerDecoder2 and to...
2022-07-18 Luke Kenneth Casso... add substep getter/setter to SVP64State
2022-07-16 Luke Kenneth Casso... simplify remapyield.py, skip shows the bit to be skipped
2022-07-14 Luke Kenneth Casso... got fed up of long list of ifs for manually decoded...
2022-07-12 Luke Kenneth Casso... add FRS as destination to PowerDecoder2 DecodeOut
2022-07-11 Luke Kenneth Casso... add mm=1 svindex test, setting single targetted SVSHAPE
2022-07-11 Luke Kenneth Casso... fix issue in SelectableInt.__rsub__ causing truncation...
2022-07-11 Luke Kenneth Casso... fix issue in SelectableInt using slices involving Selec...
2022-07-10 Luke Kenneth Casso... add yx svindex test, needed to compute size of 2nd dim
2022-07-10 Luke Kenneth Casso... Indexed SVSHAPE add bypass mode when dim sizes are 1
2022-07-10 Luke Kenneth Casso... add second svindex test, modulo 3
2022-07-10 Luke Kenneth Casso... fix svindex unit test, experiment setting dimensions
2022-07-10 Luke Kenneth Casso... fix SVSHAPE iterator for index case, stop deepcopy
2022-07-10 Luke Kenneth Casso... add new svindex sv.add test with arbitrary index map
2022-07-10 Luke Kenneth Casso... non-persistence enabled on svindex as well as svremap
2022-07-10 Luke Kenneth Casso... fix svindex pseudocode
2022-07-09 Luke Kenneth Casso... pass GPR to SVSHAPEs in ISACaller
2022-07-09 Luke Kenneth Casso... add gpr lookup in Indexed SVSHAPE iterator (no elwidths...
2022-07-09 Luke Kenneth Casso... rough unit test ahowing Index REMAP basically functiona...
2022-07-09 Luke Kenneth Casso... add support for Indexed mode in SVSHAPE
2022-07-06 Luke Kenneth Casso... add first stub of svindex pseudocode
2022-07-06 Luke Kenneth Casso... add svindex to power_enums.py, minor_22.csv
2022-07-06 Luke Kenneth Casso... convert Logical svp64_cases.py to new vector reg form
2022-07-06 Luke Kenneth Casso... convert ALU svp64_cases.py to new vector reg form
2022-07-06 Luke Kenneth Casso... converted test_caller_svstate.py to new reg format
2022-07-05 Andrey Miroshnikovconvert test_caller_svp64.py to new vector numbering...
2022-07-05 Andrey Miroshnikovconvert test_caller_svp64_predication.py to new vector...
2022-07-05 Andrey Miroshnikovconvert test_caller_svp64_ldst.py to new vector numberi...
2022-07-05 Andrey MiroshnikovUpdated the nmigen.sim import
2022-07-05 Andrey Miroshnikovconvert test_caller_svp64_fft.py to new vector numberin...
2022-07-05 Andrey Miroshnikovconvert test_caller_svp64_bc.py to new vector numbering...
2022-07-05 Andrey Miroshnikovconvert test_caller_svp64_dct.py to new vector numberin...
2022-07-05 Luke Kenneth Casso... converted test_caller_svp64_matrix.py to new reg format
2022-07-05 Luke Kenneth Casso... converted test_caller_svp64_fp.py to new reg format
next