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make truediv available to pseudocode
[openpower-isa.git]
/
src
/
openpower
/
test
/
state.py
2023-05-06
Luke Kenneth Casso...
add FPSCR to Test API (ExpectedState, SimState). untested
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2022-09-14
Jacob Lifshay
include *all* fprs/gprs/cr-fields in SimState
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2022-09-14
Jacob Lifshay
fix some typos
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2022-09-13
Jacob Lifshay
add fp support to TestRunnerBase
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2022-08-29
Jacob Lifshay
allow tests to pass None in order to not have to match...
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2022-07-26
Luke Kenneth Casso...
add first FP "expected state" use it in fmvis
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2022-07-05
Luke Kenneth Casso...
take deepcopy of regs passed in to avoid accidental...
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2021-12-04
Luke Kenneth Casso...
test in SimState for access to RADIX memory, bypass...
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2021-11-21
Luke Kenneth Casso...
move dump state to base class State in test API
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2021-11-11
Luke Kenneth Casso...
sort out numbering on CRs in SimState
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2021-11-11
Luke Kenneth Casso...
fix test API State.compare which was overwriting intreg...
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2021-11-11
Luke Kenneth Casso...
https://bugs.libre-soc.org/show_bug.cgi?id=730#c27
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2021-11-11
Luke Kenneth Casso...
use append on expected state dump, not ideal but
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2021-10-28
klehman
state.py: Fix expected dump for cr regs
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2021-10-25
klehman
tests now dump into caller dirs
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2021-10-25
klehman
tmp creation/string formatting
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2021-10-25
klehman
added dump_state_tofile for code creation
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2021-10-07
klehman
typo: gpr not fpr
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2021-10-07
klehman
various test state comments
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2021-09-25
Luke Kenneth Casso...
add name parameter to StateRunner
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2021-09-25
Luke Kenneth Casso...
add factory-function for StateRunner
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2021-09-25
Luke Kenneth Casso...
convert all SimRunner functions to yield
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2021-09-24
Luke Kenneth Casso...
guessing what extra args needed for StateRunner
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2021-09-24
klehman
add SimRunner constructor
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2021-09-23
Luke Kenneth Casso...
add extra functions for StateRunner
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2021-09-23
Luke Kenneth Casso...
create Abstract Base Class StateRunner
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2021-09-22
klehman
made mem sizes equal for compare purposes
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2021-09-21
klehman
added teststate_check_mem
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2021-09-21
Luke Kenneth Casso...
fix borked TestState.get_mem() assumed simmem.depth...
DRAFT_SVP64_0_1
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2021-09-20
Luke Kenneth Casso...
syntax error
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2021-09-20
Luke Kenneth Casso...
walk whole of sim memory rather than risk missing some...
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2021-09-18
Luke Kenneth Casso...
always store full memory state (including zeros)
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2021-09-18
klehman
added get_mem and compare_mem
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2021-09-16
Luke Kenneth Casso...
whoops must check crregs being int, not int_regs
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2021-09-16
Luke Kenneth Casso...
grr weird syntax error
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2021-09-16
klehman
pep8 fix
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2021-09-16
Luke Kenneth Casso...
reduce code linecount slightly
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2021-09-16
klehman
added defaults for expected state parameters
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2021-09-16
Luke Kenneth Casso...
moving teststate_check_regs written by klehman into...
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2021-09-15
klehman
revised state class for expected
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2021-09-15
klehman
expected class WIP
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2021-09-14
Luke Kenneth Casso...
change state_add to name, kls
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2021-09-14
Luke Kenneth Casso...
add copy of teststate.py written by klehman
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