git.libre-soc.org Git - soc.git/history - src/soc/experiment/l0

[soc.git] / src / soc / experiment / l0_cache.py

2020-05-08	Luke Kenneth Casso...	send address to memory only for one cycle and acknowled...	blob \| commitdiff \| raw
2020-05-08	Luke Kenneth Casso...	prototype LD/ST L0 cache/buffer was bouncing address...	blob \| commitdiff \| raw \| diff to current
2020-05-06	Luke Kenneth Casso...	mention need for DualPortSplitter class	blob \| commitdiff \| raw \| diff to current
2020-05-04	Luke Kenneth Casso...	comments	blob \| commitdiff \| raw \| diff to current
2020-05-04	Luke Kenneth Casso...	take out wait for busy in L0BufferCache tests	blob \| commitdiff \| raw \| diff to current
2020-05-04	Luke Kenneth Casso...	whitespace cleanup	blob \| commitdiff \| raw \| diff to current
2020-05-04	Luke Kenneth Casso...	bit of a mess, but functional. unit test passes on...	blob \| commitdiff \| raw \| diff to current
2020-05-04	Luke Kenneth Casso...	hmmm trying to get st to acknowledge properly	blob \| commitdiff \| raw \| diff to current
2020-05-04	Luke Kenneth Casso...	add links to bugreport and to memory/cache wiki page	blob \| commitdiff \| raw \| diff to current
2020-05-04	Luke Kenneth Casso...	L0 cache/buffer first unit test, working except for...	blob \| commitdiff \| raw \| diff to current
2020-05-04	Luke Kenneth Casso...	first cut at "basic" L0 Cache/Buffer (untested), only...	blob \| commitdiff \| raw \| diff to current
2020-05-04	Luke Kenneth Casso...	document PortInterface, start on "dummy" L0CacheBuffer	blob \| commitdiff \| raw \| diff to current
2020-04-27	Luke Kenneth Casso...	add LDST PortInterface class	blob \| commitdiff \| raw \| diff to current

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