2021-12-09 |
Jacob Lifshay | add parent_pspec everywhere |
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2021-12-09 |
Jacob Lifshay | format code |
tree | commitdiff |
2021-09-03 |
Luke Kenneth Casso... | another batch of ready/valid i/o prefix-suffix swaps |
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2021-08-24 |
Luke Kenneth Casso... | replace data_o with o_data and data_i with i_data as... |
tree | commitdiff |
2021-07-14 |
Luke Kenneth Casso... | update SVSTATE to 64 bit length (fortunately very easy) |
tree | commitdiff |
2021-05-04 |
Luke Kenneth Casso... | add SVSTATE (SVSRR0) to TRAP pipeline |
tree | commitdiff |
2021-05-04 |
Luke Kenneth Casso... | adding fast3 SPR to Trap pipeline and unit test |
tree | commitdiff |
2021-05-04 |
Luke Kenneth Casso... | rename IntegerData to FUBaseData |
tree | commitdiff |
2021-04-26 |
Luke Kenneth Casso... | hook up MSR into MMU (TODO, use a lot less bits) |
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2021-04-23 |
Luke Kenneth Casso... | add trap test cases |
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2021-04-23 |
Luke Kenneth Casso... | import from openpower.endian |
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2021-04-23 |
Luke Kenneth Casso... | use openpower.test.common |
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2021-04-23 |
Luke Kenneth Casso... | more openpower-isa conversion |
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2021-04-23 |
Luke Kenneth Casso... | move over to from openpower imports |
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2020-12-13 |
Cesar Strauss | Ignore formal verification output in the source directory |
tree | commitdiff |
2020-10-16 |
Luke Kenneth Casso... | experiment swapping dummy trap stage over to input |
tree | commitdiff |
2020-10-16 |
Luke Kenneth Casso... | add extra (test dummy stage in trap to see if combinato... |
tree | commitdiff |
2020-10-06 |
Luke Kenneth Casso... | skip Decode2ToOperand from PowerDecodeSubset |
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2020-10-06 |
Luke Kenneth Casso... | add SRR1 setting for LDST memory exception trap |
tree | commitdiff |
2020-10-06 |
Luke Kenneth Casso... | passing LDSTException over to Trap Pipeline |
tree | commitdiff |
2020-10-06 |
Luke Kenneth Casso... | add LDSTException decode/handling in PowerDecoder2 |
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2020-09-26 |
Cesar Strauss | Convert a few more tests to be able to use cxxsim |
tree | commitdiff |
2020-09-06 |
Luke Kenneth Casso... | comment, nothing unusual when Trap Type is DEC |
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2020-09-04 |
Luke Kenneth Casso... | adding option to include XICS external interrupts. |
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2020-08-14 |
Luke Kenneth Casso... | hrfid unit test sets up HSRR0 and HSRR1 |
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2020-08-14 |
Luke Kenneth Casso... | hack to get hrfid not to alter msr 51 |
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2020-08-14 |
Luke Kenneth Casso... | add hrfid unit test |
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2020-08-11 |
Luke Kenneth Casso... | reduce regfile ports by creating separate STATE regfile |
tree | commitdiff |
2020-08-11 |
Luke Kenneth Casso... | whoops fix change of variable (state) msr/pc |
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2020-08-04 |
Samuel A. Falvo II | Remove XXX; this seems done otherwise. |
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2020-07-29 |
Jacob Lifshay | add __init__.py to all source directories |
tree | commitdiff |
2020-07-29 |
Jacob Lifshay | format some tests |
tree | commitdiff |
2020-07-28 |
Luke Kenneth Casso... | tidyup/comments in trap proof |
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2020-07-27 |
Luke Kenneth Casso... | fix trap proof, and trap main_stage, and pseudocode... |
tree | commitdiff |
2020-07-27 |
Luke Kenneth Casso... | shorten expected_ to exp_, gets line-length down |
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2020-07-26 |
Samuel A. Falvo II | MTMSR(D) properties. |
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2020-07-26 |
Luke Kenneth Casso... | convert TRAP test to accumulator style |
tree | commitdiff |
2020-07-25 |
Luke Kenneth Casso... | update comment-headers (TODO include page numbers to... |
tree | commitdiff |
2020-07-25 |
Luke Kenneth Casso... | make trap proof section more readable |
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2020-07-24 |
Samuel A. Falvo II | Properties for MFMSR |
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2020-07-24 |
Samuel A. Falvo II | Reorganize code layout |
tree | commitdiff |
2020-07-24 |
Samuel A. Falvo II | WIP: SC properties more closely match doc'd behavior |
tree | commitdiff |
2020-07-24 |
Samuel A. Falvo II | WIP: addressing code review, restoring proofs, etc. |
tree | commitdiff |
2020-07-24 |
Luke Kenneth Casso... | got fed up with bit-slice ordering crap. cut it out |
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2020-07-24 |
Luke Kenneth Casso... | code review comments for trap and proof |
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2020-07-24 |
Samuel A. Falvo II | Refactorin of common code |
tree | commitdiff |
2020-07-24 |
Samuel A. Falvo II | Address code review comments |
tree | commitdiff |
2020-07-22 |
Jacob Lifshay | Merge remote-tracking branch 'origin/master' |
tree | commitdiff |
2020-07-22 |
Jacob Lifshay | format code |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | whoops forgot field accessor |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | whoops typo, 63-start not 3-start (doh) |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | field number ordering wrong way round? |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | syntax error |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | review trap main_stage.py modifications: we are not... |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | add comment headings with spec page numbers |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | comment on op.insn ordering |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | code-shuffle, add comments |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | add TT.size and use it in PowerDecoder and trap input... |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | inline comments in trap proof |
tree | commitdiff |
2020-07-22 |
Samuel A. Falvo II | Complete FV properties for OP_TRAP instructions. |
tree | commitdiff |
2020-07-22 |
Samuel A. Falvo II | PEP8 compliance |
tree | commitdiff |
2020-07-21 |
Samuel A. Falvo II | Completed SC FV properties |
tree | commitdiff |
2020-07-21 |
Samuel A. Falvo II | Refine properties to comply with spec |
tree | commitdiff |
2020-07-21 |
Samuel A. Falvo II | Fix where msr_i gets its value from |
tree | commitdiff |
2020-07-21 |
Samuel A. Falvo II | Merge in recent updates to TRAP FV properties. |
tree | commitdiff |
2020-07-21 |
Luke Kenneth Casso... | move cia and msr to trap input record |
tree | commitdiff |
2020-07-21 |
Luke Kenneth Casso... | add msr exception bits setting function in hardware |
tree | commitdiff |
2020-07-21 |
Luke Kenneth Casso... | corrections to trap proof see |
tree | commitdiff |
2020-07-21 |
Luke Kenneth Casso... | use alias for msr_i in trap proof |
tree | commitdiff |
2020-07-21 |
Luke Kenneth Casso... | correct trap spec page interrupt ref |
tree | commitdiff |
2020-07-20 |
Samuel A. Falvo II | Rework SC properties to conform to style |
tree | commitdiff |
2020-07-20 |
Samuel A. Falvo II | Formal properties for RFID. |
tree | commitdiff |
2020-07-18 |
Luke Kenneth Casso... | whoops use slice not range |
tree | commitdiff |
2020-07-18 |
Luke Kenneth Casso... | syntax error |
tree | commitdiff |
2020-07-18 |
Luke Kenneth Casso... | add comment and copy of pseudo-code for OP_RFID into... |
tree | commitdiff |
2020-07-18 |
Luke Kenneth Casso... | review of OP_RFID showed up some errors |
tree | commitdiff |
2020-07-18 |
Luke Kenneth Casso... | corrections to trap main_stage.py OP_RFID according... |
tree | commitdiff |
2020-07-18 |
Samuel A. Falvo II | WIP: FV failing for unknown reasons. |
tree | commitdiff |
2020-07-18 |
Jacob Lifshay | Merge branch 'master' of ssh://git.libre-riscv.org... |
tree | commitdiff |
2020-07-18 |
Samuel A. Falvo II | Failing test: fast1/fast2 vs srr0/srr1? on trap pipe |
tree | commitdiff |
2020-07-18 |
Samuel A. Falvo II | forgot to clean up workspace in source |
tree | commitdiff |
2020-07-18 |
Samuel A. Falvo II | FV props for SC instruction |
tree | commitdiff |
2020-07-17 |
Samuel A. Falvo II | First FV property for trap unit |
tree | commitdiff |
2020-07-16 |
Luke Kenneth Casso... | add mfmsr trap tests |
tree | commitdiff |
2020-07-15 |
Luke Kenneth Casso... | use new CompOpSubsetBase in trap |
tree | commitdiff |
2020-07-15 |
Luke Kenneth Casso... | remove unneeded comment in trap msin stage |
tree | commitdiff |
2020-07-15 |
Luke Kenneth Casso... | remove unneeded comment in trap pipe_data |
tree | commitdiff |
2020-07-15 |
Luke Kenneth Casso... | move traptype to soc.consts |
tree | commitdiff |
2020-07-15 |
Luke Kenneth Casso... | test privileged rfid call |
tree | commitdiff |
2020-07-15 |
Luke Kenneth Casso... | set MSR up properly for privileged mtmsr test |
tree | commitdiff |
2020-07-14 |
Luke Kenneth Casso... | adding MSR.PR unit test intended to activate privileged... |
tree | commitdiff |
2020-07-13 |
Luke Kenneth Casso... | add mtmsrd instruction and unit test |
tree | commitdiff |
2020-07-12 |
Luke Kenneth Casso... | rename InternalOp to MicrOp |
tree | commitdiff |
2020-07-11 |
Luke Kenneth Casso... | sorting out bigendian/littleendian including in qemu |
tree | commitdiff |
2020-07-08 |
Jacob Lifshay | Merge branch 'master' of ssh://git.libre-riscv.org... |
tree | commitdiff |
2020-07-06 |
Luke Kenneth Casso... | adding mtspr tests |
tree | commitdiff |
2020-07-06 |
Luke Kenneth Casso... | adding OP_MTMSR test |
tree | commitdiff |
2020-07-05 |
Luke Kenneth Casso... | add mtmsr tests (fail) |
tree | commitdiff |
2020-07-05 |
Luke Kenneth Casso... | check msr in trap test, fix OP_RFID |
tree | commitdiff |
2020-07-05 |
Luke Kenneth Casso... | add an illegal instruction trap test |
tree | commitdiff |
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