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Implement transparent read ports on the phased write SRAM
[soc.git]
/
src
/
soc
/
regfile
/
sram_wrapper.py
2022-04-02
Cesar Strauss
Implement transparent read ports on the phased write...
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2022-04-02
Cesar Strauss
Implement and test a "phased write port" memory
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2022-03-27
Cesar Strauss
Finish the SRAM formal proof by implementing induction
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2022-03-26
Cesar Strauss
Add formal verification of the single port memory block
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2022-03-13
Cesar Strauss
Simulate some read/write/modify operations on the SRAM...
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2022-03-13
Cesar Strauss
Add a Single R/W Port SRAM model
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