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add test_0_moduw and correct name to trunc_rem
[soc.git]
/
src
/
soc
/
simulator
/
test_div_sim.py
2020-06-19
Luke Kenneth Casso...
add test_0_moduw and correct name to trunc_rem
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2020-06-19
Luke Kenneth Casso...
add simulator test for divw
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