| 2022-04-15 |
Tobias Platen | whitespace |
tree | commitdiff |
| 2022-04-15 |
Tobias Platen | add orangecrab to list of supported boards |
tree | commitdiff |
| 2022-04-14 |
Luke Kenneth Casso... | reduce versa_ecp5 clock freq to 50 mhz, reduce bit... |
tree | commitdiff |
| 2022-04-14 |
Luke Kenneth Casso... | add default args in DDR3SoC |
tree | commitdiff |
| 2022-04-14 |
Luke Kenneth Casso... | put fw_addr back to 0xff00_0000, xics.bin test passed |
tree | commitdiff |
| 2022-04-14 |
Luke Kenneth Casso... | move firmware to address 0x0 to test microwatt xics.bin |
tree | commitdiff |
| 2022-04-14 |
Luke Kenneth Casso... | bleh. add XICS_ICS and XICS_ICP but the patch is |
tree | commitdiff |
| 2022-04-14 |
Luke Kenneth Casso... | code-comments for when ASyncBridge is deployed |
tree | commitdiff |
| 2022-04-14 |
Luke Kenneth Casso... | add new dram_clk_freq argument which does nothing for now |
tree | commitdiff |
| 2022-04-14 |
Luke Kenneth Casso... | add an extra domain dramsync2x in preparation for |
tree | commitdiff |
| 2022-04-14 |
Luke Kenneth Casso... | add a dramsync2x domain as well |
tree | commitdiff |
| 2022-04-14 |
Luke Kenneth Casso... | move 2x-clock-and-dividing into separate function in... |
tree | commitdiff |
| 2022-04-13 |
Luke Kenneth Casso... | get microwatt-verilator sim running at different boot... |
tree | commitdiff |
| 2022-04-12 |
Luke Kenneth Casso... | add comments on locations where async bridge needs... |
tree | commitdiff |
| 2022-04-11 |
Luke Kenneth Casso... | too big, shift down to 2MB offset |
tree | commitdiff |
| 2022-04-11 |
Luke Kenneth Casso... | fix coldboot to boot from return address |
tree | commitdiff |
| 2022-04-11 |
Luke Kenneth Casso... | put versa_ecp5 below 50 mhz as a bodge-way to stop... |
tree | commitdiff |
| 2022-04-10 |
Luke Kenneth Casso... | Revert "Wire up missing CRG / DDR3 clock control /... |
tree | commitdiff |
| 2022-04-10 |
Luke Kenneth Casso... | Revert "Put sysclk2x back under system reset control" |
tree | commitdiff |
| 2022-04-10 |
Raptor Engineering... | Put sysclk2x back under system reset control |
tree | commitdiff |
| 2022-04-09 |
Luke Kenneth Casso... | add QSPI dump back in (smaller one) to check it is... |
tree | commitdiff |
| 2022-04-09 |
Raptor Engineering... | Wire up missing CRG / DDR3 clock control / reset signals |
tree | commitdiff |
| 2022-04-09 |
Luke Kenneth Casso... | shuffle addresses around a bit |
tree | commitdiff |
| 2022-04-08 |
Luke Kenneth Casso... | add DRAM offset into SYSCON and jump to DRAM if flash... |
tree | commitdiff |
| 2022-04-08 |
Luke Kenneth Casso... | add ELF reading to coldboot.c, move spi address to... |
tree | commitdiff |
| 2022-04-08 |
Luke Kenneth Casso... | add read of SYSCON and entry for SPIFlash |
tree | commitdiff |
| 2022-04-08 |
Luke Kenneth Casso... | up the delay-time on ddr3 reset, put loop around dram... |
tree | commitdiff |
| 2022-04-08 |
Luke Kenneth Casso... | comment/80-char limit |
tree | commitdiff |
| 2022-04-07 |
Raptor Engineering... | Enable DDR3 using a 50MHz clock on Versa 85 |
tree | commitdiff |
| 2022-04-07 |
Raptor Engineering... | Move simulation HyperRAM pins off of DDR3 pins |
tree | commitdiff |
| 2022-04-06 |
Luke Kenneth Casso... | add QSPI support to arty_a7 |
tree | commitdiff |
| 2022-04-04 |
Luke Kenneth Casso... | allow setting individual directions on QSPI dq0-dq3 |
tree | commitdiff |
| 2022-04-04 |
Luke Kenneth Casso... | sigh put firmware.hex qspi file in correct place |
tree | commitdiff |
| 2022-04-04 |
Luke Kenneth Casso... | increase power-on-delay for icarus sim to allow reset... |
tree | commitdiff |
| 2022-04-04 |
Luke Kenneth Casso... | disable ethmac for now, pass firmware.hex to cypress... |
tree | commitdiff |
| 2022-04-04 |
Luke Kenneth Casso... | redo start address of firmware so it can be specified... |
tree | commitdiff |
| 2022-04-04 |
Raptor Engineering... | Fix SPI device simulation model MISO/MOSI wiring |
tree | commitdiff |
| 2022-04-02 |
Raptor Engineering... | Add 10/100 MAC pins for Versa boards and enable MAC |
tree | commitdiff |
| 2022-03-31 |
Luke Kenneth Casso... | got icarus verilog model of QSPI working and it returns... |
tree | commitdiff |
| 2022-03-31 |
Luke Kenneth Casso... | whitespace cleanup |
tree | commitdiff |
| 2022-03-31 |
Raptor Engineering... | Fix Tercel QSPI master connections |
tree | commitdiff |
| 2022-03-31 |
Luke Kenneth Casso... | remove {err} feature from Tercel |
tree | commitdiff |
| 2022-03-29 |
Luke Kenneth Casso... | add err wishbone feature to Tercel |
tree | commitdiff |
| 2022-03-29 |
Luke Kenneth Casso... | remove clk from spi_flash, |
tree | commitdiff |
| 2022-03-29 |
Luke Kenneth Casso... | add qspi module to arty_a7 |
tree | commitdiff |
| 2022-03-29 |
Luke Kenneth Casso... | use nmigen_boards naming conventions for SPIFlash |
tree | commitdiff |
| 2022-03-29 |
Luke Kenneth Casso... | update comments, link/setup of peripherals |
tree | commitdiff |
| 2022-03-29 |
Luke Kenneth Casso... | add TODO comments about using platform.add_resources |
tree | commitdiff |
| 2022-03-29 |
Luke Kenneth Casso... | whitespace cleanup, 80 char limit |
tree | commitdiff |
| 2022-03-29 |
Raptor Engineering... | Add initial integration for OpenCores 10/100 Ethernet MAC |
tree | commitdiff |
| 2022-03-28 |
Raptor Engineering... | Fix instructions in comment |
tree | commitdiff |
| 2022-03-27 |
Luke Kenneth Casso... | set reset from ResetSignal not straight to 1 for HyperRAM |
tree | commitdiff |
| 2022-03-27 |
Luke Kenneth Casso... | try latency of 7 for winbond hyperram |
tree | commitdiff |
| 2022-03-27 |
Luke Kenneth Casso... | set upper CSns on HyperRAM to zero and set reset_n HI |
tree | commitdiff |
| 2022-03-26 |
Luke Kenneth Casso... | add clock output on hyperram sim |
tree | commitdiff |
| 2022-03-26 |
Luke Kenneth Casso... | add all 4 CSn lines for Quad HyperRAM PMOD |
tree | commitdiff |
| 2022-03-26 |
Luke Kenneth Casso... | grr |
tree | commitdiff |
| 2022-03-26 |
Luke Kenneth Casso... | reduce power-on-delay bits to 2 for icarus sim ecp5 |
tree | commitdiff |
| 2022-03-26 |
Luke Kenneth Casso... | remove switches from hyperram iverilog test |
tree | commitdiff |
| 2022-03-26 |
Luke Kenneth Casso... | remove unneeded model variable |
tree | commitdiff |
| 2022-03-26 |
Luke Kenneth Casso... | add missing ECP5 model OBZ.v and rename testbench |
tree | commitdiff |
| 2022-03-26 |
Luke Kenneth Casso... | sort out platform IO pads for iverilog hyperram sim |
tree | commitdiff |
| 2022-03-26 |
Luke Kenneth Casso... | add hyperram iverilog runner including s27kl0641.v... |
tree | commitdiff |
| 2022-03-25 |
Luke Kenneth Casso... | rename ECP5 CRG, move source, remove duplicate version |
tree | commitdiff |
| 2022-03-25 |
Luke Kenneth Casso... | up arty a7 frequency to 40 mhz |
tree | commitdiff |
| 2022-03-25 |
Luke Kenneth Casso... | increase time for power-on-delay to 2^25 in ECP5 |
tree | commitdiff |
| 2022-03-24 |
Luke Kenneth Casso... | increase delay on ECP5 ulx3s |
tree | commitdiff |
| 2022-03-24 |
Luke Kenneth Casso... | check ulx3s, add CRG support for ulx3s |
tree | commitdiff |
| 2022-03-24 |
Luke Kenneth Casso... | establish power-on reset stabilisation for Arty A7... |
tree | commitdiff |
| 2022-03-22 |
Luke Kenneth Casso... | add hack to modify VERSA_ECP5 85F platform to speed... |
tree | commitdiff |
| 2022-03-22 |
Luke Kenneth Casso... | adding hyperram for arty a7 and also adding a workaroun... |
tree | commitdiff |
| 2022-03-20 |
Luke Kenneth Casso... | crank A7 FPGA speed down to experiment |
tree | commitdiff |
| 2022-03-20 |
Luke Kenneth Casso... | code-comments |
tree | commitdiff |
| 2022-03-20 |
Luke Kenneth Casso... | fix Arty A7-100t PLL with quick demo |
tree | commitdiff |
| 2022-03-20 |
Luke Kenneth Casso... | first cut at Arty A7 Clock-Reset-Generator with S7 PLL |
tree | commitdiff |
| 2022-03-20 |
Luke Kenneth Casso... | beginnings of arty a7 clock-reset-generator |
tree | commitdiff |
| 2022-03-19 |
Luke Kenneth Casso... | add VERSA_ECP5 85F custom board |
tree | commitdiff |
| 2022-03-19 |
Luke Kenneth Casso... | set IO_TYPE 3.3v attribute on HyperRAM not IOSTANDARD |
tree | commitdiff |
| 2022-03-19 |
Luke Kenneth Casso... | correct pin names for HyperRAMResource, indent spi0... |
tree | commitdiff |
| 2022-03-19 |
Luke Kenneth Casso... | fixed hyperram pin names which was stopping verilator... |
tree | commitdiff |
| 2022-03-19 |
Luke Kenneth Casso... | disable hyperram for now (under investigation) |
tree | commitdiff |
| 2022-03-19 |
Luke Kenneth Casso... | adding in hyperram peripheral |
tree | commitdiff |
| 2022-03-18 |
Luke Kenneth Casso... | whitespace / module-import / comments / tidyup |
tree | commitdiff |
| 2022-03-18 |
Luke Kenneth Casso... | beginning to add hyperram module |
tree | commitdiff |
| 2022-03-18 |
Luke Kenneth Casso... | whitespace cleanup and make SPI core (temporarily)... |
tree | commitdiff |
| 2022-03-17 |
Luke Kenneth Casso... | work-in-progress on DDR3 firmware. sigh |
tree | commitdiff |
| 2022-03-16 |
Raptor Engineering... | Add initial Tercel SPI controller |
tree | commitdiff |
| 2022-03-10 |
Luke Kenneth Casso... | sigh gramWishbone is not WB4-pipeline-burst-compliant |
tree | commitdiff |
| 2022-03-09 |
Luke Kenneth Casso... | fix WB6to32 downconverter with stall signalling |
tree | commitdiff |
| 2022-03-09 |
Luke Kenneth Casso... | add stall signal to arbiter, assume nmigen-soc takes |
tree | commitdiff |
| 2022-03-04 |
Luke Kenneth Casso... | add experimental stall-capable 64-to-32 wishbone converter |
tree | commitdiff |
| 2022-03-02 |
Luke Kenneth Casso... | invert reset and chip-select on dram, and initialise... |
tree | commitdiff |
| 2022-03-01 |
Luke Kenneth Casso... | add new icarus-versa-ecp5 platform in ls2.py |
tree | commitdiff |
| 2022-02-28 |
Luke Kenneth Casso... | increase timescale of icarus simulation |
tree | commitdiff |
| 2022-02-28 |
Luke Kenneth Casso... | fix undefined uart_tx in icarus simulation, icarus... |
tree | commitdiff |
| 2022-02-28 |
Luke Kenneth Casso... | add icarus simulation of ls2 with DDR3 and ECP5 models |
tree | commitdiff |
| 2022-02-23 |
Luke Kenneth Casso... | invert CRG reset on PLL see if it makes any difference |
tree | commitdiff |
| 2022-02-23 |
Luke Kenneth Casso... | add comments about DRAM sync clock being identical... |
tree | commitdiff |
| 2022-02-22 |
Luke Kenneth Casso... | xdr=4 missing on ddr3 platform request for VERSA_ECP5 |
tree | commitdiff |
| 2022-02-21 |
Luke Kenneth Casso... | * use readl and writel for accessing memory |
tree | commitdiff |
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