add missing file
[soc.git] / src /
2020-09-21 Luke Kenneth Casso... add missing file
2020-09-21 Luke Kenneth Casso... add quick wishbone jtag test
2020-09-21 Luke Kenneth Casso... experiment set dmi msr read
2020-09-21 Luke Kenneth Casso... add DMI JTAG test
2020-09-21 Luke Kenneth Casso... add JTAG basic unit test
2020-09-21 Luke Kenneth Casso... arg complete rewrite of JTAG2DMI, based it on staf...
2020-09-20 Cesar StraussAdd induction proof for the FSM Shifter
2020-09-20 Cesar StraussAdd bounded proof to FSM Shifter
2020-09-20 Cesar StraussLet the formal engine create some test cases for the...
2020-09-20 Luke Kenneth Casso... resolve issues in async sim: must not drive async clock...
2020-09-20 Luke Kenneth Casso... still experimenting with async FF sync
2020-09-20 Luke Kenneth Casso... continuing async clock experimenting
2020-09-20 Luke Kenneth Casso... add an async clock synchronizer experiment
2020-09-20 Luke Kenneth Casso... first version code-morph on dmi2jtag
2020-09-19 Luke Kenneth Casso... add pc_o not connected
2020-09-19 Luke Kenneth Casso... set ROM to empty, set SRAM to tiny 0x200, get things...
2020-09-19 Cesar StraussRemove demonstration code
2020-09-19 Luke Kenneth Casso... urk. wishbone slave devices declared incorrectly (I... semi_working_ecp5
2020-09-19 Luke Kenneth Casso... disable internal RAM set SRAM to much smaller
2020-09-19 Luke Kenneth Casso... shrink size of SRAM to 8k, move things around
2020-09-19 Luke Kenneth Casso... add (disabled) tri-state GPIO
2020-09-19 Luke Kenneth Casso... remove the gpio peripheral which was previously hard...
2020-09-19 Luke Kenneth Casso... add 3x EINTs to ls180soc
2020-09-18 Luke Kenneth Casso... add SPI, sdcard, preliminary GPIO to ls180 pinouts
2020-09-18 Luke Kenneth Casso... argh got fed up trying to shoe-horn into sim.py
2020-09-18 Luke Kenneth Casso... can remove unneeded overrides of Prev/Next Control
2020-09-17 Jacob Lifshayadd divwe regression test case
2020-09-17 Jacob Lifshayre-enable test case -- no longer goes into an infinite...
2020-09-17 Jacob Lifshayfix bug #492
2020-09-17 Jacob Lifshayreplace sim._state.timeline.now with sim._engine.now
2020-09-17 Luke Kenneth Casso... add versa ecp5 fpga litex build script
2020-09-16 Cole Poiriercomplete first translation pass of dmi_dtm_xilinx.vhdl...
2020-09-16 Luke Kenneth Casso... make a start on LS180 platform
2020-09-16 Cole Poirierinitial commit of JTAGToDMI debug interface translated...
2020-09-16 Cole Poirieradd template file/starting point (copy of litex/boards...
2020-09-15 Luke Kenneth Casso... add back (totally confusing) accidentally-removed code...
2020-09-15 Luke Kenneth Casso... instantiate MMU from AllFunctionUnits
2020-09-15 Luke Kenneth Casso... do not need FAST regs in MMU
2020-09-15 Luke Kenneth Casso... comment mmu test
2020-09-15 Luke Kenneth Casso... add edge-triggering to dcache/mmu "valid"
2020-09-15 Luke Kenneth Casso... add set MTSPR prtbl to mmu unit test
2020-09-15 Luke Kenneth Casso... add OP_MFSPR to mmu
2020-09-15 Luke Kenneth Casso... use convenience vars
2020-09-15 Luke Kenneth Casso... add OP_TLBIE to mmu fsm
2020-09-15 Luke Kenneth Casso... add OP_DCBZ to mmu fsm, needs RA to be added to MMU...
2020-09-15 Luke Kenneth Casso... add MMU MTSPR connection into FSM
2020-09-15 Luke Kenneth Casso... add in MMU and DCache into MMU FSM
2020-09-15 Luke Kenneth Casso... moved PLRU to nmutil
2020-09-15 Luke Kenneth Casso... add mmu fsm
2020-09-15 Luke Kenneth Casso... remove more (confusing/spurious) types, should be in...
2020-09-15 Luke Kenneth Casso... remove more (confusing/spurious) types, should be in...
2020-09-15 Luke Kenneth Casso... remove more (confusing/spurious) types, should be in...
2020-09-15 Luke Kenneth Casso... removed (confusing/spurious) types, should be in .pyi...
2020-09-15 Luke Kenneth Casso... add MMU FunctionUnit
2020-09-15 Luke Kenneth Casso... mmu uses RB, go with it
2020-09-15 Luke Kenneth Casso... add OP_TLBIE
2020-09-15 Luke Kenneth Casso... add mmu initial pipe_data.py
2020-09-15 Luke Kenneth Casso... add extra "modes" to PortInterface
2020-09-15 Luke Kenneth Casso... syntax error correction
2020-09-15 Luke Kenneth Casso... add inline comments into icache.py
2020-09-14 Cole Poiriericache.py add missing funciton bodies, add missing...
2020-09-14 Luke Kenneth Casso... increase TLB_NUM_WAYS to 4
2020-09-14 Luke Kenneth Casso... vhdl conversion not really working for plru
2020-09-14 Luke Kenneth Casso... add array signal names
2020-09-14 Luke Kenneth Casso... rename plru input
2020-09-14 Luke Kenneth Casso... rename plru input
2020-09-14 Luke Kenneth Casso... reorg mmu lookup test so it is called twice
2020-09-14 Luke Kenneth Casso... TLB PLRUs are of TLB_WAY_BITS width
2020-09-14 Luke Kenneth Casso... fix mmu perms/lookup in dcache
2020-09-14 Luke Kenneth Casso... whitespace
2020-09-14 Luke Kenneth Casso... remove duplicated signal
2020-09-14 Luke Kenneth Casso... comments on icache
2020-09-14 Luke Kenneth Casso... get rid of rst
2020-09-14 Luke Kenneth Casso... use word_select
2020-09-14 Luke Kenneth Casso... add mmu-dcache test
2020-09-14 Cole Poiriericache.py connect up all the sub-functions, fix typos...
2020-09-14 Cole Poiriericache.py add parameters to 'process' functions, fix...
2020-09-13 Cole Poiriericache.py move get/read/write functions out of ICache...
2020-09-13 Cole Poiriericache.py copy simulation code from dcache.py, fix...
2020-09-13 Cole Poiriericache.py fix syntax, move all constants and Array...
2020-09-13 Cole Poiriericache.py fix syntax errors that occured when running...
2020-09-13 Luke Kenneth Casso... dcache truncate wishbone address, store real_addr in...
2020-09-13 Luke Kenneth Casso... last mmu get seems ok
2020-09-13 Luke Kenneth Casso... whoops recursion error v.shift calculated from v.shift
2020-09-13 Luke Kenneth Casso... more experimenting with mmu READ_WAIT state
2020-09-13 Luke Kenneth Casso... radix tree wait error, investigating
2020-09-13 Luke Kenneth Casso... mmu test starting to make sense
2020-09-13 Luke Kenneth Casso... floundering around with MMU unit test, no idea what...
2020-09-13 Luke Kenneth Casso... mmu code-morph
2020-09-13 Luke Kenneth Casso... code-morph, add masked function
2020-09-13 Luke Kenneth Casso... move code to mmu_0
2020-09-13 Luke Kenneth Casso... add example radix walk from power-gem5
2020-09-13 Luke Kenneth Casso... MMU test
2020-09-13 Luke Kenneth Casso... clarify
2020-09-13 Luke Kenneth Casso... sort out ariane PLRU, rename/clarify
2020-09-13 Luke Kenneth Casso... minor error in plru
2020-09-13 Luke Kenneth Casso... rename cache_valid_bits to cache_validsg
2020-09-13 Luke Kenneth Casso... cache_valid_idx too large in dcache
2020-09-13 Luke Kenneth Casso... whoops, cache valid array too small in dcache
2020-09-12 Luke Kenneth Casso... more dcache debugging
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