change sv/trans/svp64.py source/dest elwidth assembler naming
[openpower-isa.git] / src /
2022-09-18 Luke Kenneth Casso... change sv/trans/svp64.py source/dest elwidth assembler...
2022-09-18 Dmitry Selyutintest_pysvp64dis: test sw specifier
2022-09-18 Dmitry Selyutinpower_insn: support sw specifier
2022-09-18 Dmitry Selyutinpower_insn: decouple common normal and ld/st RM
2022-09-18 Dmitry Selyutinpower_insn: support ew specifier
2022-09-18 Dmitry Selyutinpower_insn: simplify subvl disassembly
2022-09-17 Luke Kenneth Casso... add sat/satu test_12_sat to test_pysvp64dis.py
2022-09-17 Dmitry Selyutinpower_insn: fix sat checks
2022-09-17 Dmitry Selyutinpysvp64asm: SVP64 instruction debug logs
2022-09-17 Luke Kenneth Casso... whoops. mode-bits need to be put in MSB0 order. sigh
2022-09-17 Dmitry Selyutinpower_fields: fix mapping class accessor
2022-09-17 Dmitry Selyutinpower_fields: support boolean checks
2022-09-17 Dmitry Selyutinpower_insn: fix zz specifiers
2022-09-17 Dmitry Selyutinpower_insn: drop field length method again
2022-09-17 Dmitry Selyutinpower_insn: decouple base ld/st idx RM
2022-09-17 Dmitry Selyutinpower_insn: decouple base ld/st imm RM
2022-09-17 Dmitry Selyutinpower_insn: decouple base normal RM
2022-09-17 Dmitry Selyutinpower_insn: support saturation mode
2022-09-17 Dmitry Selyutinpower_insn: support dz/sz specifiers
2022-09-17 Luke Kenneth Casso... add zz mode to sv/trans/svp64.py as a hack
2022-09-17 Luke Kenneth Casso... remove sv.setvl/pk/up/pu - these are all gone in favour...
2022-09-17 Luke Kenneth Casso... add MASK_SRC to power_insn.py (SVmask_src from enums)
2022-09-17 Luke Kenneth Casso... add SVmask_src enum, rename fields to EN and NO to...
2022-09-17 Luke Kenneth Casso... as a double-check sv_analysis new CSV column "SM" was...
2022-09-17 Luke Kenneth Casso... add a "SM" column into RM*.csv (and LDSTRM*.csv) identi...
2022-09-17 Luke Kenneth Casso... add sv.add/ew=XX test to test_pysvp64dis.py
2022-09-17 Luke Kenneth Casso... remove pack/unpack modes from power_insn.py, they no...
2022-09-17 Dmitry Selyutinselectable_int: drop redundant operators
2022-09-17 Dmitry Selyutinpower_insn: support vec2/vec3/vec4
2022-09-17 Dmitry Selyutinpower_insn: support specifiers
2022-09-17 Dmitry Selyutinpower_fields: fix comparison operators
2022-09-17 Dmitry Selyutinpower_insn: refactor and fix RM mappings
2022-09-17 Dmitry Selyutinpower_fields: fix field slicing
2022-09-17 Dmitry Selyutinpower_insn: fix mapping bits accessors
2022-09-17 Dmitry Selyutinpower_fields: support traversing over instances
2022-09-17 Dmitry Selyutinpower_insn: drop redundant table
2022-09-17 Dmitry Selyutinpower_fields: inherit docstrings upon remap
2022-09-17 Luke Kenneth Casso... add vec2/3/4 test_pysvp64dis test
2022-09-16 Luke Kenneth Casso... comments on test_9_fptrans
2022-09-16 Dmitry Selyutintest_power_decoder: mark minor_19.csv as opint
2022-09-16 Dmitry Selyutintest_pysvp64dis: test fptrans
2022-09-16 Dmitry Selyutinselectable_int: replace bit_count with bit_length
2022-09-16 Dmitry Selyutinsv_binutils_fptrans: adopt script for reuse
2022-09-16 Dmitry Selyutinpower_insn: postpone updating per-instruction operands
2022-09-15 Dmitry Selyutinpower_insn: perform faster PPC database lookups
2022-09-15 Dmitry Selyutinsv_binutils_fptrans: fix disassembly
2022-09-15 Dmitry Selyutinsv_binutils_fptrans: fptrans binutils generator
2022-09-15 Dmitry Selyutinpower_insn: support instruction bytes conversion
2022-09-15 Dmitry Selyutinselectable_int: allow setting multiple bit
2022-09-15 Dmitry Selyutinpower_insn: allow accessing instruction bits
2022-09-15 Luke Kenneth Casso... add minor_4.csv for maddld/maddhdu/maddhd and to insn_d...
2022-09-15 Luke Kenneth Casso... fix sprset mtspr/mfspr pseudocode with wrong definition of
2022-09-14 Jacob Lifshayadd svp64 fptrans tests
2022-09-14 Jacob Lifshayinclude *all* fprs/gprs/cr-fields in SimState
2022-09-14 Jacob Lifshayfix sv_analysis for fpown and frootn
2022-09-14 Jacob Lifshayfix some typos
2022-09-13 Dmitry Selyutinpower_insn: support signed operands
2022-09-13 Dmitry Selyutinpower_insn: support branch RM
2022-09-13 Dmitry Selyutinpower_insn: support CR RM
2022-09-13 Dmitry Selyutinpower_enums: convert SVExtra to RegType
2022-09-13 Dmitry Selyutinpower_insn: refactor RM mapping
2022-09-13 Dmitry Selyutinsv_binutils: support multiple opcodes; minor fixes
2022-09-13 Luke Kenneth Casso... correct assrmbler in test_pysvpy4dis.py
2022-09-13 Jacob Lifshayadd comment that fptrans test cases output values are...
2022-09-13 Jacob Lifshayadd new fptrans unit tests
2022-09-13 Jacob Lifshayadd fptrans support to isa caller
2022-09-13 Jacob Lifshayadd fp support to TestRunnerBase
2022-09-13 Luke Kenneth Casso... add first pack/unpack to ISACaller
2022-09-13 Luke Kenneth Casso... add setter/getter properties to SVP64State, minor code...
2022-09-13 Luke Kenneth Casso... remove pack/unpack from SVP64RMModeDecode, it is now...
2022-09-13 Luke Kenneth Casso... add batch of instructions from
2022-09-12 Luke Kenneth Casso... add hack overloaded meaning of destwid to be pack/unpack.
2022-09-12 Dmitry Selyutinpower_insn: refactor RM mapping
2022-09-12 Dmitry Selyutinsv_binutils: support multiple opcodes; minor fixes
2022-09-12 Dmitry Selyutinpower_insn: call sv_spec_leave unconditionally
2022-09-12 Dmitry Selyutinpower_enums: consider CRIn2Sel
2022-09-12 Dmitry Selyutinpower_insn: fix RCOE check
2022-09-12 Dmitry Selyutinpower_insn: introduce pseudo cr_in2
2022-09-12 Dmitry Selyutinpower_enums: strict selectors conversion
2022-09-12 Dmitry Selyutinpower_insn: fix typo
2022-09-12 Dmitry Selyutinpower_insn: support BRANCH and CR mode stubs
2022-09-12 Dmitry Selyutinpower_insn: refactor register operands
2022-09-12 Jacob Lifshayadd fptrans helpers, switching existing uses to new...
2022-09-12 Luke Kenneth Casso... add hphint and pack/unpack into SVSTATE SPR layout
2022-09-12 Jacob Lifshayadd fptrans ops to src/openpower/sv/trans/svp64.py
2022-09-12 Luke Kenneth Casso... remove pack/unpack - now part of sv.setvl
2022-09-12 Luke Kenneth Casso... add rudimentary sv.setvl unit test to just check that...
2022-09-12 Luke Kenneth Casso... add sv.setvl to instructions as a major hack
2022-09-12 Luke Kenneth Casso... split out setvl from sv.setvl test in test_pysvp64dis.py
2022-09-12 Luke Kenneth Casso... add extra tests "add." "addo" etc. to test_pysvp64dis.py
2022-09-12 Luke Kenneth Casso... demo that "setvl." is not reconstructed with Rc=1 mode
2022-09-12 Luke Kenneth Casso... skip addpcis for now, needs properly qualifying
2022-09-11 Luke Kenneth Casso... add new CRIn2Sel for later, for getting rid of CRInSel...
2022-09-11 Luke Kenneth Casso... BFT does not exist
2022-09-11 Luke Kenneth Casso... add sv.isel 12,2,3,*99 test to test_pysvp64dis.py
2022-09-11 Luke Kenneth Casso... add some CR3 pysvp64dis.py tests, sv.crand
2022-09-11 Dmitry Selyutinpower_insn: check exact matches directly in set
2022-09-11 Dmitry Selyutinpower_insn: group opcodes and names
2022-09-11 Luke Kenneth Casso... add sv.isel asm-disasm tests to test_pysvp64dis.py
2022-09-11 Luke Kenneth Casso... add missing addpcis to power_enums.py and minor_19.csv
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