Jacob Lifshay [Mon, 4 Jul 2022 10:41:24 +0000 (03:41 -0700)]
misc bug fixes and cleanup in fpbase.py
Jacob Lifshay [Mon, 4 Jul 2022 06:18:20 +0000 (23:18 -0700)]
add tests for non-power-of-2 shifts for MultiShift* classes
Jacob Lifshay [Mon, 4 Jul 2022 06:15:14 +0000 (23:15 -0700)]
fix MultiShift* classes to correctly calculate shift-amount bit width
Jacob Lifshay [Sat, 2 Jul 2022 02:59:39 +0000 (19:59 -0700)]
start implementing fp fused-mul-add pipeline
https://bugs.libre-soc.org/show_bug.cgi?id=877
Jacob Lifshay [Sat, 2 Jul 2022 02:54:20 +0000 (19:54 -0700)]
disable fadd f32 formal proofs by default -- they're too slow
Jacob Lifshay [Fri, 1 Jul 2022 22:01:37 +0000 (15:01 -0700)]
fix copyright years
[skip ci]
Luke Kenneth Casson Leighton [Fri, 1 Jul 2022 08:03:36 +0000 (09:03 +0100)]
update README, include links to source code
mention grant numbers, and that nmigen is Trademarked.
+nmigen is a Registered Trademark of M-Labs
+https://uspto.report/TM/
88980893
Jacob Lifshay [Fri, 1 Jul 2022 08:00:10 +0000 (01:00 -0700)]
change gitlab-ci to show test names
Jacob Lifshay [Fri, 1 Jul 2022 07:59:05 +0000 (00:59 -0700)]
fix my name
Luke Kenneth Casson Leighton [Fri, 1 Jul 2022 07:38:51 +0000 (08:38 +0100)]
update Copyright year
Jacob Lifshay [Fri, 1 Jul 2022 05:07:27 +0000 (22:07 -0700)]
add fsub support to fadd pipeline
Jacob Lifshay [Fri, 1 Jul 2022 03:34:24 +0000 (20:34 -0700)]
finish adding all rounding modes to fadd -- formal proof passes
Jacob Lifshay [Wed, 29 Jun 2022 04:39:22 +0000 (21:39 -0700)]
add rounding modes to fpbase.Overflow
Jacob Lifshay [Tue, 28 Jun 2022 05:53:06 +0000 (22:53 -0700)]
f32 fadd formal proof is fast enough -- don't skip it anymore
Jacob Lifshay [Tue, 28 Jun 2022 05:27:39 +0000 (22:27 -0700)]
add correct NaN propagation to the fadd pipeline and formal proof
Jacob Lifshay [Tue, 28 Jun 2022 05:27:28 +0000 (22:27 -0700)]
add bitwuzla to gitlab-ci
Jacob Lifshay [Tue, 28 Jun 2022 03:44:28 +0000 (20:44 -0700)]
add formal proofs for other fadd widths, but with unittest.skip
Jacob Lifshay [Sat, 25 Jun 2022 01:04:09 +0000 (18:04 -0700)]
add initial f16 fadd formal proof
Jacob Lifshay [Fri, 24 Jun 2022 05:23:41 +0000 (22:23 -0700)]
change .gitlab-ci.yml to use nmigen with smtlib2 support
Luke Kenneth Casson Leighton [Tue, 17 May 2022 08:59:29 +0000 (09:59 +0100)]
add set-logic ALL clause to stop cvc5 warning
Jacob Lifshay [Tue, 17 May 2022 03:42:26 +0000 (20:42 -0700)]
change run command
Jacob Lifshay [Tue, 17 May 2022 03:38:16 +0000 (20:38 -0700)]
add fp16mul_test.smt2
Jacob Lifshay [Fri, 13 May 2022 22:36:01 +0000 (15:36 -0700)]
remove redundant bvadd with 1 input
Jacob Lifshay [Fri, 13 May 2022 22:10:17 +0000 (15:10 -0700)]
add missing inf * 0 -> NaN cases
Jacob Lifshay [Fri, 13 May 2022 08:23:32 +0000 (01:23 -0700)]
add fpmul_test.smt2 as a test to see if we should bother trying to wire-up smtlib2 real and fp support in yosys and nmigen
It's probably correct, z3 ran longer than I bothered to wait, it usually stops relatively quickly if there's an error in the logic.
Jacob Lifshay [Thu, 12 May 2022 03:58:48 +0000 (20:58 -0700)]
fix ci not finding sfpy
Jacob Lifshay [Thu, 12 May 2022 03:06:31 +0000 (20:06 -0700)]
fix tests/mark as expected failure
Jacob Lifshay [Thu, 12 May 2022 03:05:15 +0000 (20:05 -0700)]
format code
Jacob Lifshay [Thu, 12 May 2022 01:34:17 +0000 (18:34 -0700)]
pin some dependency versions
Jacob Lifshay [Wed, 11 May 2022 08:26:41 +0000 (01:26 -0700)]
remove redundant arguments that are now specified in pyproject.toml
Jacob Lifshay [Wed, 11 May 2022 08:24:04 +0000 (01:24 -0700)]
fix some borked imports
Jacob Lifshay [Wed, 11 May 2022 08:21:54 +0000 (01:21 -0700)]
add pytest config -- it ignores some borked files
Jacob Lifshay [Tue, 10 May 2022 04:45:43 +0000 (21:45 -0700)]
make sfpy build
Jacob Lifshay [Tue, 10 May 2022 04:13:17 +0000 (21:13 -0700)]
fix .gitlab-ci.yml
Jacob Lifshay [Thu, 2 Dec 2021 01:56:09 +0000 (17:56 -0800)]
switch to using nmutil's FHDLTestCase
Luke Kenneth Casson Leighton [Mon, 8 Nov 2021 11:25:28 +0000 (11:25 +0000)]
allow alias SimdSignal<-PartitionedSignal to allow tracking back through
git revision history
Luke Kenneth Casson Leighton [Sat, 30 Oct 2021 13:20:13 +0000 (14:20 +0100)]
comments
Luke Kenneth Casson Leighton [Sat, 30 Oct 2021 13:13:44 +0000 (14:13 +0100)]
allow scope to be None in SimdShape, it becomes an empty
storage shell for parameters until a scope is given,
at which point a new SindShape is created and the PartitionPoints
can all be set up.
Luke Kenneth Casson Leighton [Sat, 30 Oct 2021 10:35:07 +0000 (11:35 +0100)]
add SimdScope.__call__ function needed to copy and adapt scope
Luke Kenneth Casson Leighton [Sat, 30 Oct 2021 10:26:31 +0000 (11:26 +0100)]
add setmodule function to SimdScope
Luke Kenneth Casson Leighton [Thu, 28 Oct 2021 11:30:55 +0000 (12:30 +0100)]
put in (unused) code for SimdShape.__mul__ when both LHS and RHS
are SimdShapes. this is unused at present, needs review
Luke Kenneth Casson Leighton [Thu, 28 Oct 2021 11:15:40 +0000 (12:15 +0100)]
start filling in integer SimdShape.__mul__ case with list of uses, based
on whether the SimdShape was initially created as FIXED priority or
ELWID priority.
Luke Kenneth Casson Leighton [Thu, 28 Oct 2021 10:41:49 +0000 (11:41 +0100)]
add SimdShape "priority" mode flag
(not used, yet)
Jacob Lifshay [Thu, 28 Oct 2021 04:06:15 +0000 (21:06 -0700)]
add initial SimdShape.__add__
Jacob Lifshay [Thu, 28 Oct 2021 03:58:46 +0000 (20:58 -0700)]
add initial SimdShape.__mul__
Jacob Lifshay [Thu, 28 Oct 2021 03:57:29 +0000 (20:57 -0700)]
format code
Jacob Lifshay [Thu, 28 Oct 2021 03:41:34 +0000 (20:41 -0700)]
remove SimdScope.get() and friends
Jacob Lifshay [Thu, 28 Oct 2021 03:36:51 +0000 (20:36 -0700)]
format code
Jacob Lifshay [Wed, 27 Oct 2021 09:11:14 +0000 (02:11 -0700)]
add tests for SimdMap and friends
Jacob Lifshay [Wed, 27 Oct 2021 09:10:24 +0000 (02:10 -0700)]
add SimdWHintMap to support tracking width_hint for XLEN
Luke Kenneth Casson Leighton [Mon, 25 Oct 2021 17:52:48 +0000 (18:52 +0100)]
hooray, convert PartitionedCat over to new PartType API, using
get_num_elements and get_el_range
Luke Kenneth Casson Leighton [Mon, 25 Oct 2021 17:30:53 +0000 (18:30 +0100)]
add two new functions to PartType: get_num_elements and get_el_range
Luke Kenneth Casson Leighton [Mon, 25 Oct 2021 13:36:55 +0000 (14:36 +0100)]
remove fixed_width parameter from SimdScope.Signal
after working out how to explicitly use a SimdShape
Luke Kenneth Casson Leighton [Mon, 25 Oct 2021 13:35:57 +0000 (14:35 +0100)]
use explicit SimdShape for minitest example rather than
fixed_width parameter
Luke Kenneth Casson Leighton [Mon, 25 Oct 2021 13:28:55 +0000 (14:28 +0100)]
had to add fixed_width parameter temporarily to confirm that the
minitest, test_partsig_scope.py, worked (which it did).
now can work out how to remove it
Luke Kenneth Casson Leighton [Mon, 25 Oct 2021 13:19:02 +0000 (14:19 +0100)]
debugging of initial test_partsig_scope.py mini-test
scope and shape need to be stored in SimdSignal in order to get at them
later
Luke Kenneth Casson Leighton [Mon, 25 Oct 2021 12:29:51 +0000 (13:29 +0100)]
adapt/debug SimdSignal when using ElwidPartType
example mini-test with test_partsig_scope.py working through issues
Luke Kenneth Casson Leighton [Mon, 25 Oct 2021 12:29:06 +0000 (13:29 +0100)]
remove unnecessary imports
Luke Kenneth Casson Leighton [Mon, 25 Oct 2021 12:14:06 +0000 (13:14 +0100)]
remove unnecessary code which creates complications from SimdScope
constructor.
elwid is mandatory, vec_el_counts is mandatory. no need for complicated
types, complicated adaptation, complicated interlocking conditional
behaviour.
pass in elwid (Signal)
pass in vec_el_counts.
done.
Luke Kenneth Casson Leighton [Mon, 25 Oct 2021 11:19:04 +0000 (12:19 +0100)]
rename the arguments to SimdShape() so as to match up with Shape() params
Luke Kenneth Casson Leighton [Mon, 25 Oct 2021 11:10:46 +0000 (12:10 +0100)]
add SimdScope.Shape redirector which switches from scalar to simd behaviour
depending on context.
for compatibility with nmigen Shape() the width parameter is passed
through to widths_at_elwid in SimdShape, allowing the layout() function
the opportunity to turn a scalar width into fixed element widths at
all elwids.
Luke Kenneth Casson Leighton [Mon, 25 Oct 2021 10:33:51 +0000 (11:33 +0100)]
start filling in ElwidPartType switch/case and other info
needed to get it functional and a drop-in replacement for the old
PartitionedSignal PartType behaviour
Luke Kenneth Casson Leighton [Mon, 25 Oct 2021 10:25:03 +0000 (11:25 +0100)]
create a SimdShape class and begin to investigate how to tie it in
to ElwidPartType.
Luke Kenneth Casson Leighton [Mon, 25 Oct 2021 09:47:08 +0000 (10:47 +0100)]
add more code-comments
Luke Kenneth Casson Leighton [Sun, 24 Oct 2021 18:32:01 +0000 (19:32 +0100)]
return layout points from layout()
Luke Kenneth Casson Leighton [Sun, 24 Oct 2021 18:26:47 +0000 (19:26 +0100)]
spelling corrections after typing on a phone
Luke Kenneth Casson Leighton [Sun, 24 Oct 2021 16:14:43 +0000 (17:14 +0100)]
add dictionary of list of layout points, start-end
ElwidPartType it looks like it needs to know where each element
starts and ends, therefore provide that info at the point it was
created
Luke Kenneth Casson Leighton [Sun, 24 Oct 2021 10:13:56 +0000 (11:13 +0100)]
add docstrings for additional necessary context-aware versions of
Signal.like and Shape in SimdScope.
Luke Kenneth Casson Leighton [Fri, 22 Oct 2021 16:41:20 +0000 (17:41 +0100)]
from mobile reslly bad spelling comment why layout should remain a fn
Luke Kenneth Casson Leighton [Fri, 22 Oct 2021 14:29:18 +0000 (15:29 +0100)]
add back-link to why SimdScope has to get the hell out the way when
scalar=True
Luke Kenneth Casson Leighton [Fri, 22 Oct 2021 14:21:51 +0000 (15:21 +0100)]
add in code-comments
noticed a lot of weird code (including the hint that there might be
an intention to treat SimdSignal as a scalar ("one elwid, full width")
which is very dangerous (explained already)
added in particular some notes about the parameters that go through
to layout()
Luke Kenneth Casson Leighton [Fri, 22 Oct 2021 14:14:13 +0000 (15:14 +0100)]
add comments / docstrings for layout function to illustrate where
the parameters actually come from
Luke Kenneth Casson Leighton [Fri, 22 Oct 2021 14:03:22 +0000 (15:03 +0100)]
only set standard PartType in non-Simd-mode
Luke Kenneth Casson Leighton [Fri, 22 Oct 2021 14:01:16 +0000 (15:01 +0100)]
in SimdScope only update module AST Typecast function in SIMD mode
do not whatever you do change the mode over to Simd casting in Scalar mode
Luke Kenneth Casson Leighton [Fri, 22 Oct 2021 13:41:41 +0000 (14:41 +0100)]
add the beginnings of a usage docstring for the module and add a Signal
function which shows how to connect things together.
with SimdScope being passed in as the "mask" parameter, the SimdSignal
knows to switch over to "ElwidPartType mode"
Luke Kenneth Casson Leighton [Fri, 22 Oct 2021 13:39:19 +0000 (14:39 +0100)]
remove simd_full_width_hint, it is down to individual Signals within the
context to explicitly declare their width, if in fact they need one.
some cases (as shown in the layout() function) no fixed (full) width
is required to explicitly be specified, it is determined instead from
the element widths
Luke Kenneth Casson Leighton [Fri, 22 Oct 2021 13:15:18 +0000 (14:15 +0100)]
add in TODO notes tying in SimdScope/SimdMode
Jacob Lifshay [Fri, 22 Oct 2021 07:40:09 +0000 (00:40 -0700)]
add type annotations .pyi file for SimdScope
Jacob Lifshay [Fri, 22 Oct 2021 07:39:42 +0000 (00:39 -0700)]
update SimdScope to use vec_el_counts
Jacob Lifshay [Fri, 22 Oct 2021 05:58:33 +0000 (22:58 -0700)]
move SimdScope to separate file
Luke Kenneth Casson Leighton [Thu, 21 Oct 2021 15:56:51 +0000 (16:56 +0100)]
add LHS support into PartitionedCat. amazingly - stunningly - it works
https://bugs.libre-soc.org/show_bug.cgi?id=731
Luke Kenneth Casson Leighton [Thu, 21 Oct 2021 15:50:01 +0000 (16:50 +0100)]
confirmed (in prototype form that LHS Cat will cause conflict
Luke Kenneth Casson Leighton [Thu, 21 Oct 2021 14:04:33 +0000 (15:04 +0100)]
continue truly awful hack which, in SimdSignal.__Assign__, detects the
back-link to the submodule (PartitionedCat) in its return result,
and calls set_lhs_mode(True) or (False) on LHS and RHS as appropriate.
the default value is *NOT* set in the PartitionedCat constructor very very
deliberately so as to show up any bugs. it is particularly fortunate that
this was chosen to be done because there was, in fact, a bug in the
TestCatMod unit test, which assumed that it was ok to splat a Cat() result
of a pair of SimdSignals directly onto a Signal().
it *is* in fact "technically allowed" by nmigen due to automatic casting
of UserValue, but should not strictly have been done.
Luke Kenneth Casson Leighton [Thu, 21 Oct 2021 13:31:36 +0000 (14:31 +0100)]
add back-link in the return result of PartitionedCat to allow access
to the submodule.
PartitionedAssign can then detect this and alter the conditions to
LHS *before* PartitionedCat.elaborate() is called
it was already established in commit
494757caa1f that the elaborates
are all called later
Luke Kenneth Casson Leighton [Thu, 21 Oct 2021 12:40:29 +0000 (13:40 +0100)]
add quick print statements to show that elaborate() gets called as a
second phase after the creation of the AST tree
this gives a window of opportunity to tree-walk and set whether SimdSignals
are LHS or RHS as determined by encountering SimdSignal.__Assign__
Luke Kenneth Casson Leighton [Thu, 21 Oct 2021 12:06:35 +0000 (13:06 +0100)]
found an error in PartitionedAssign and PartitionedRepl
where Slice was accidentally being done on SimdSignal rather than
SimdSignals internal sig. whilst this was a legitimate oversight
the bug should have been found when a NotImplemented SimdSignal.__Slice__
was added.
Project Development Practices were violated here by unit tests not
having been run, which would have easily detected the bug
Luke Kenneth Casson Leighton [Thu, 21 Oct 2021 11:50:58 +0000 (12:50 +0100)]
remove duplicate function definition
Luke Kenneth Casson Leighton [Thu, 21 Oct 2021 11:49:53 +0000 (12:49 +0100)]
remove reference to use of Swizzled class, due to it violating
Project Development Practices
documented here:
https://bugs.libre-soc.org/show_bug.cgi?id=731#c10
Jacob Lifshay [Sat, 16 Oct 2021 01:19:11 +0000 (18:19 -0700)]
add forgotten files from last commit
Jacob Lifshay [Sat, 16 Oct 2021 01:12:49 +0000 (18:12 -0700)]
add WIP code for handling Slice and Cat in a unified way, supporting assignment
Jacob Lifshay [Fri, 15 Oct 2021 23:58:24 +0000 (16:58 -0700)]
format code
Jacob Lifshay [Fri, 15 Oct 2021 05:05:23 +0000 (22:05 -0700)]
fix bmask calculation
Jacob Lifshay [Fri, 15 Oct 2021 03:53:09 +0000 (20:53 -0700)]
split out end_bit
Jacob Lifshay [Fri, 15 Oct 2021 03:51:09 +0000 (20:51 -0700)]
split out start_bit
Jacob Lifshay [Fri, 15 Oct 2021 03:45:49 +0000 (20:45 -0700)]
remove redundant plist variable
Jacob Lifshay [Fri, 15 Oct 2021 03:27:42 +0000 (20:27 -0700)]
sort dpoints keys
Jacob Lifshay [Fri, 15 Oct 2021 03:21:12 +0000 (20:21 -0700)]
simplify dpoints computation
width is already set to fixed_width, we don't need to have a separate case
Jacob Lifshay [Fri, 15 Oct 2021 03:20:43 +0000 (20:20 -0700)]
dedup dpoints
Jacob Lifshay [Fri, 15 Oct 2021 03:10:04 +0000 (20:10 -0700)]
delete superfluous documentation section
Jacob Lifshay [Fri, 15 Oct 2021 03:09:40 +0000 (20:09 -0700)]
format code