mesa.git
6 years agowinsys/amdgpu: Stop using amdgpu_bo_handle_type_kms_noimport
Michel Dänzer [Thu, 1 Nov 2018 11:30:42 +0000 (12:30 +0100)]
winsys/amdgpu: Stop using amdgpu_bo_handle_type_kms_noimport

It only behaves any different from amdgpu_bo_handle_type_kms with
libdrm 2.4.93, and it breaks if an older version is picked up.

Bugzilla: https://bugs.freedesktop.org/108096
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
6 years agointel/dump_gpu: add platform option
Lionel Landwerlin [Wed, 7 Nov 2018 10:55:05 +0000 (10:55 +0000)]
intel/dump_gpu: add platform option

Got tired of remembering the PCI ids.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
6 years agointel/dump_gpu: move output option together
Lionel Landwerlin [Wed, 7 Nov 2018 10:55:04 +0000 (10:55 +0000)]
intel/dump_gpu: move output option together

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
6 years agoradv: disable conditional rendering for vkCmdCopyQueryPoolResults()
Samuel Pitoiset [Mon, 5 Nov 2018 08:54:28 +0000 (09:54 +0100)]
radv: disable conditional rendering for vkCmdCopyQueryPoolResults()

VK_EXT_conditional_rendering says that copy commands should not be
affected by conditional rendering.

Cc: 18.2 18.3 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
6 years agoradv: allocate enough space in CS when copying query results with compute
Samuel Pitoiset [Mon, 5 Nov 2018 09:35:36 +0000 (10:35 +0100)]
radv: allocate enough space in CS when copying query results with compute

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
6 years agoac/nir_to_llvm: fix b2f for f64
Timothy Arceri [Fri, 2 Nov 2018 02:33:52 +0000 (13:33 +1100)]
ac/nir_to_llvm: fix b2f for f64

Fixes: d7e0d47b9de3 ("nir: Add a bunch of b2[if] optimizations")
Reviewed-by: Dave Airlie <airlied@redhat.com>
6 years agogm107/ir: use scalar tex instructions where possible
Karol Herbst [Sun, 5 Aug 2018 16:34:22 +0000 (18:34 +0200)]
gm107/ir: use scalar tex instructions where possible

TEXS, TLD4 and TLD4S are variants of tex instructions which are more
scalar, which gives RA more freedom and is less likely to insert silly
MOVs to satisfy quad registers.

shader-db changes:
total instructions in shared programs : 7687265 -> 7614782 (-0.94%)
total gprs used in shared programs    : 803620 -> 798045 (-0.69%)
total shared used in shared programs  : 639636 -> 639636 (0.00%)
total local used in shared programs   : 24648 -> 24648 (0.00%)
total bytes used in shared programs   : 82103400 -> 81330696 (-0.94%)

                local     shared        gpr       inst      bytes
    helped           0           0        3648       10647       10647
      hurt           0           0         464         205         205

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
6 years agonv50/ir: add scalar field to TexInstructions
Karol Herbst [Sun, 5 Aug 2018 17:12:48 +0000 (19:12 +0200)]
nv50/ir: add scalar field to TexInstructions

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
6 years agonv50/ra: add condenseDef overloads for partial condenses
Karol Herbst [Sun, 5 Aug 2018 18:41:49 +0000 (20:41 +0200)]
nv50/ra: add condenseDef overloads for partial condenses

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
6 years agonv50/ir: print color masks of tex instructions
Karol Herbst [Sun, 5 Aug 2018 17:12:32 +0000 (19:12 +0200)]
nv50/ir: print color masks of tex instructions

v2: print the mask for TXG as well
    make the mask to be printed more mask like

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
6 years agovulkan: Update the XML and headers to 1.1.91
Jason Ekstrand [Tue, 6 Nov 2018 15:48:59 +0000 (09:48 -0600)]
vulkan: Update the XML and headers to 1.1.91

The biggest change here is the rename of VK_NVX_ray_tracing to
VK_NV_ray_tracing and the total removal of VK_KHR_mir_surface.

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
6 years agor600: Add support for EXT_texture_sRGB_R8
Gert Wollny [Thu, 1 Nov 2018 11:59:27 +0000 (12:59 +0100)]
r600: Add support for EXT_texture_sRGB_R8

Enables on R600 and makes pass:
  dEQP-GLES31.functional.srgb_texture_decode.skip_decode.sr8.*
  dEQP-GLES31.functional.texture.filtering.cube_array.formats.sr8*

v2: remove chunk for dri/radeon (Emil)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
6 years agoanv/android: mark gralloc allocated BOs as external
Lionel Landwerlin [Tue, 6 Nov 2018 11:37:51 +0000 (11:37 +0000)]
anv/android: mark gralloc allocated BOs as external

Allocating through Gralloc implies buffers are going to be used
outside the driver. We have special MOCS settings for external BOs and
we probably want to use them here too.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: a1220e73116bad7 ("anv/android: Set the BO flags in bo_cache_import (v2)")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
6 years agoanv: stub internal android code
Lionel Landwerlin [Tue, 6 Nov 2018 11:37:50 +0000 (11:37 +0000)]
anv: stub internal android code

This reduces the amount of #ifdef ANDROID we'll have to have inside
the driver. Potentially offering better coverage of the android
extensions.

v2: Move anv_android.h include before anv_entrypoints.h (Tapani)
    Fix autotools android build (Lionel)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
6 years agofreedreno/a6xx: Clear z32 and separate stencil with blitter
Kristian H. Kristensen [Fri, 19 Oct 2018 04:41:21 +0000 (21:41 -0700)]
freedreno/a6xx: Clear z32 and separate stencil with blitter

Signed-off-by: Kristian H. Kristensen <hoegsberg@chromium.org>
6 years agofreedreno/a6xx: fix VSC bug with larger # of tiles
Rob Clark [Tue, 30 Oct 2018 12:41:58 +0000 (08:41 -0400)]
freedreno/a6xx: fix VSC bug with larger # of tiles

At higher resolutions with the addition of MSAA, the number of tiles
can increase to the point where we use more than one VSC pipe per
tile.  Which would cause us to calculate an out-of-bounds offset for
VSC_SIZE_ADDRESS.  So don't try to be clever, just always put it at
a fixed offset assuming the max 32 VSC pipes in use.

Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agofreedreno: update generated headers
Rob Clark [Mon, 29 Oct 2018 17:28:45 +0000 (13:28 -0400)]
freedreno: update generated headers

Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agowayland/egl: Resize EGL surface on update buffer for swrast
Olivier Fourdan [Thu, 25 Oct 2018 12:48:15 +0000 (14:48 +0200)]
wayland/egl: Resize EGL surface on update buffer for swrast

After commit a9fb331ea ("wayland/egl: update surface size on window
resize"), the surface size is updated as soon as the resize is done, and
`update_buffers()` would resize only if the surface size differs from
the attached size.

However, in the case of swrast, there is no resize callback and the
attached size is updated in `dri2_wl_swrast_commit_backbuffer()` prior
to the `swrast_update_buffers()` so the attached size is always up to
date when it reaches `swrast_update_buffers()` and the surface is never
resized.

This can be observed with "totem" using the GDK backend on Wayland (the
default) when running on software rendering:

  $ LIBGL_ALWAYS_SOFTWARE=true CLUTTER_BACKEND=gdk totem

Resizing the window would leave the EGL surface size unchanged.

To avoid the issue, partially revert the part of commit a9fb331ea for
`swrast_update_buffers()` and resize on the win size and not the
attached size.

Fixes: a9fb331ea - wayland/egl: update surface size on window resize
Signed-off-by: Olivier Fourdan <ofourdan@redhat.com>
CC: Daniel Stone <daniel@fooishbar.org>
CC: Juan A. Suarez Romero <jasuarez@igalia.com>
CC: mesa-stable@lists.freedesktop.org
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
6 years agointel/decoders: fix instruction base address parsing
Lionel Landwerlin [Mon, 5 Nov 2018 20:42:40 +0000 (20:42 +0000)]
intel/decoders: fix instruction base address parsing

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 00103db04ab879 ("intel: Fix decoding for partial STATE_BASE_ADDRESS updates.")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
6 years agoegl/glvnd: correctly report errors when vendor cannot be found
Emil Velikov [Fri, 2 Nov 2018 18:34:19 +0000 (18:34 +0000)]
egl/glvnd: correctly report errors when vendor cannot be found

If the user provides an invalid display or device the ToVendor lookup
will fail.

In this case, the local [Mesa vendor] error code will be set. Thus on
sequential eglGetError(), the error will be EGL_SUCCESS.

To be more specific, GLVND remembers the last vendor and calls back
into it's eglGetError, although there's no guarantee to ever have had
one.

v2:
 - Add _eglError call, so the debug callback is executed (Kyle)
 - Drop XXX comment.

Piglit: tests/egl/spec/egl_ext_device_query
Fixes: ce562f9e3fa ("EGL: Implement the libglvnd interface for EGL (v3)")
Cc: Eric Engestrom <eric@engestrom.ch>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Kyle Brenneman <kbrenneman@nvidia.com>
6 years agoegl: add EGL_EXT_device_base entrypoints
Emil Velikov [Fri, 2 Nov 2018 18:50:48 +0000 (18:50 +0000)]
egl: add EGL_EXT_device_base entrypoints

eglQueryDevicesEXT (unlike the other three functions) does not depend
on the display. It is implemented in GLVND, which calls into each
driver collecting the list of devices and presenting it to the user.

For the other entrypoints, GLVND acts as pass through stub calling into
the vendor library. The vendor implementation calls back into GLVND to
get the vendor dispatch. Then the driver proceeds to call itself via
the said dispatch.

This design makes is possible to keep using "old" GLVND with newer
vendor drivers. Since effectively all the extension code is within the
latter itself.

Without said entrypoints, any user will outright crash - as reported in
the bug report.

Note: there's a follow-up fix needed to our GLVND code, to make piglit
happy.

v2: add some beefy documentation in the commit message.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108635
Fixes: 7552fcb7b9b ("egl: add base EGL_EXT_device_base implementation")
Reported-by: kyle.devir@mykolab.com
Cc: kyle.devir@mykolab.com
Acked-by: Eric Engestrom <eric@engestrom.ch>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Tested-by: Emil Velikov <emil.velikov@collabora.com>
6 years agodocs: mention EXT_shader_implicit_conversions
Emil Velikov [Fri, 2 Nov 2018 15:48:26 +0000 (15:48 +0000)]
docs: mention EXT_shader_implicit_conversions

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
6 years agost/va: fix incorrect use of resource_destroy
Marek Olšák [Sat, 3 Nov 2018 00:56:42 +0000 (20:56 -0400)]
st/va: fix incorrect use of resource_destroy

Fixes: 4373dd32154 ("st/va: Support YUV formats in vaCreateSurfaces")
Cc: Drew Davenport <ddavenport@chromium.org>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
6 years agoi965/batch/debug: Allow log be dumped before assert
Sergii Romantsov [Mon, 5 Nov 2018 13:02:49 +0000 (15:02 +0200)]
i965/batch/debug: Allow log be dumped before assert

Message that may show the culprit of assert now will
be dumped before that for debug purposes.

Signed-off-by: Sergii Romantsov <sergii.romantsov@globallogic.com>
Reviewed-by: Lionel G Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
6 years agointel/sanitize_gpu: add debug message on mmap fail
Lionel Landwerlin [Mon, 29 Oct 2018 18:14:47 +0000 (18:14 +0000)]
intel/sanitize_gpu: add debug message on mmap fail

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
6 years agointel/sanitize_gpu: deal with non page multiple buffer sizes
Lionel Landwerlin [Mon, 29 Oct 2018 18:14:46 +0000 (18:14 +0000)]
intel/sanitize_gpu: deal with non page multiple buffer sizes

We can only map at page aligned offsets. We got that wrong with buffer
size where (size % 4096) != 0 (anv has a WA buffer of 1024).

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
6 years agointel/sanitize_gpu: add help/gdb options to wrapper
Lionel Landwerlin [Mon, 29 Oct 2018 18:14:45 +0000 (18:14 +0000)]
intel/sanitize_gpu: add help/gdb options to wrapper

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
6 years agointel/dump_gpu: add missing gdb option
Lionel Landwerlin [Mon, 29 Oct 2018 18:14:44 +0000 (18:14 +0000)]
intel/dump_gpu: add missing gdb option

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
6 years agowsi/wayland: only finish() a successfully init()ed display
Eric Engestrom [Mon, 5 Nov 2018 09:57:09 +0000 (09:57 +0000)]
wsi/wayland: only finish() a successfully init()ed display

Fixes: 43691024982b3ea734ad0 "vulkan/wsi/wayland: Stop caching Wayland displays"
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
6 years agowsi/wayland: use proper VkResult type
Eric Engestrom [Mon, 5 Nov 2018 09:55:02 +0000 (09:55 +0000)]
wsi/wayland: use proper VkResult type

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
6 years agoautotools: library-dependency when no sse and 32-bit
Sergii Romantsov [Thu, 1 Nov 2018 11:02:43 +0000 (13:02 +0200)]
autotools: library-dependency when no sse and 32-bit

Building of 32bit Mesa may fail if __SSE__ is not specified.
Added missed dependency from libm.

v2: avoided dependecy on any flag, just link

v3: meson doesn't fail, but have added dependency on libm

CC: Dylan Baker <dylan@pnwbakers.com>
CC: Lionel G Landwerlin <lionel.g.landwerlin@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108560
Signed-off-by: Sergii Romantsov <sergii.romantsov@globallogic.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
6 years agoradv: more use of radv_cp_wait_mem()
Samuel Pitoiset [Wed, 31 Oct 2018 11:00:12 +0000 (12:00 +0100)]
radv: more use of radv_cp_wait_mem()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
6 years agoradv: replace si_emit_wait_fence() with radv_cp_wait_mem()
Samuel Pitoiset [Wed, 31 Oct 2018 11:00:11 +0000 (12:00 +0100)]
radv: replace si_emit_wait_fence() with radv_cp_wait_mem()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
6 years agoradv: add missing TFB queries support to CmdCopyQueryPoolsResults()
Samuel Pitoiset [Wed, 31 Oct 2018 10:43:34 +0000 (11:43 +0100)]
radv: add missing TFB queries support to CmdCopyQueryPoolsResults()

Cc: 18.3 <mesa-stable@lists.freedesktop.org>
Fixes: b4eb029062a ("radv: implement VK_EXT_transform_feedback")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
6 years agoradv: remove useless sync after copying query results with compute
Samuel Pitoiset [Fri, 2 Nov 2018 11:20:48 +0000 (12:20 +0100)]
radv: remove useless sync after copying query results with compute

The spec says:
   "vkCmdCopyQueryPoolResults is considered to be a transfer
    operation, and its writes to buffer memory must be synchronized
    using VK_PIPELINE_STAGE_TRANSFER_BIT and VK_ACCESS_TRANSFER_WRITE_BIT
    before using the results."

VK_PIPELINE_STAGE_TRANSFER_BIT will wait for compute to be idle,
while VK_ACCESS_TRANSFER_WRITE_BIT will invalidate both L1 vector
caches and L2. So, it's useless to set those flags internally.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
6 years agor600/sb: Fix constant logical operand in assert.
Vinson Lee [Wed, 31 Oct 2018 22:35:23 +0000 (15:35 -0700)]
r600/sb: Fix constant logical operand in assert.

Fixes: da977ad90747 ("r600/sb: start adding GDS support")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-By: Gert Wollny <gert.wollny@collabora.com>
6 years agost/mesa: Don't record garbage streamout information in the non-SSO case.
Kenneth Graunke [Thu, 25 Oct 2018 09:16:27 +0000 (02:16 -0700)]
st/mesa: Don't record garbage streamout information in the non-SSO case.

In the non-SSO case, where multiple shader stages are linked together,
we were recording garbage pipe_stream_output_info structures for all
but the last enabled geometry-processing stage.

Specifically, we were using the gl_transform_feedback_info from
shader_program->last_vert_prog (the stage whose outputs will be
recorded)...but were pairing it with the output varying mappings
from the current shader stage.  For example, a program with a VS and
GS, the VS's pipe_shader_state would have a pipe_stream_output_info
based on the GS transform feedback info, but the VS output mapping.

This generally worked out okay because only the pipe_stream_output_info
for the last stage really matters - the others can be ignored.  However,
we'd like to avoid confusing the pipe driver.  In particular, my new
driver translates the stream out information to hardware packets at
bind_{vs,tes,gs}_state() time...and was hitting asserts about garbage
varyings that didn't exist.

This patch changes st/mesa to record a blank pipe_stream_output_info
with num_outputs = 0 for all stages prior to last_vert_prog.  The last
one is captured as normal.

(In the fully-SSO case, nothing should change - each program contains
a single shader stage, so last_vert_prog *is* the current shader.)

Tested with llvmpipe (piglit's gpu profile), and freedreno (a3xx,
gpu profile with -t transform.feedback).  Fixes several hundred CTS
tests on my new driver.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
6 years agost/nir: Drop unused parameter from st_nir_assign_uniform_locations().
Kenneth Graunke [Thu, 25 Oct 2018 09:22:34 +0000 (02:22 -0700)]
st/nir: Drop unused parameter from st_nir_assign_uniform_locations().

ARB programs won't have one of these, and we don't use it anyway.

Reviewed-by: Rob Clark <robdclark@gmail.com>
6 years agost/mesa: Pull nir_lower_wpos_ytransform work into a helper function.
Kenneth Graunke [Thu, 25 Oct 2018 09:22:33 +0000 (02:22 -0700)]
st/mesa: Pull nir_lower_wpos_ytransform work into a helper function.

This will let me use it in the ARB program code as well.

Reviewed-by: Rob Clark <robdclark@gmail.com>
6 years agointel: Use a URB start offset of 0 for disabled stages.
Kenneth Graunke [Mon, 8 Oct 2018 21:54:00 +0000 (14:54 -0700)]
intel: Use a URB start offset of 0 for disabled stages.

There are some cases where the VS is the only stage enabled, it uses the
entire URB, and the URB is large enough that placing later stages after
the VS exceeds the number of bits for "URB Starting Address".

For example, on Icelake GT2, "varying-packing-simple mat2x4 array" from
Piglit is getting a starting offset of 128 for the GS/HS/DS.  But the
field is only large enough to hold an offset of 127.

i965 doesn't hit any genxml assertions because it's still using the old
OUT_BATCH mechanism.  128 << GEN7_URB_STARTING_ADDRESS_SHIFT (57) == 0,
with the extra bit falling off the end.  So we place the disabled stage
at the beginning of the URB (overlapping with push constants).  This is
likely okay since it's a zero size region (0 entries).

It seems like the Vulkan driver might hit this assertion, however, and
the situation seems harmless.  To work around this, always place
disabled stages at the start of the URB, so the last enabled stage can
fill the remaining space without overflowing the field.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
6 years agoandroid: radv: add libmesa_git_sha1 static dependency
Mauro Rossi [Tue, 30 Oct 2018 21:35:43 +0000 (22:35 +0100)]
android: radv: add libmesa_git_sha1 static dependency

libmesa_git_sha1 whole static dependency is added to get git_sha1.h header
and avoid following building error:

external/mesa/src/amd/vulkan/radv_device.c:46:10:
fatal error: 'git_sha1.h' file not found
         ^
1 error generated.

Fixes: 9d40ec2cf6 ("radv: Add support for VK_KHR_driver_properties.")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
6 years agovc4: Use the normal simulator ioctl path for CL submit as well.
Eric Anholt [Fri, 2 Nov 2018 19:33:04 +0000 (12:33 -0700)]
vc4: Use the normal simulator ioctl path for CL submit as well.

The simulator no longer needs to look back into the gallium structs.

6 years agovc4: Maintain a separate GEM mapping of BOs in the simulator.
Eric Anholt [Fri, 2 Nov 2018 19:03:36 +0000 (12:03 -0700)]
vc4: Maintain a separate GEM mapping of BOs in the simulator.

This will let us avoid looking back into the gallium driver's vc4_bo.

6 years agovc4: Take advantage of _mesa_hash_table_remove_key() in the simulator.
Eric Anholt [Fri, 2 Nov 2018 18:57:14 +0000 (11:57 -0700)]
vc4: Take advantage of _mesa_hash_table_remove_key() in the simulator.

6 years agov3d: Remove the special path for simulaton of the submit ioctl.
Eric Anholt [Fri, 2 Nov 2018 18:51:58 +0000 (11:51 -0700)]
v3d: Remove the special path for simulaton of the submit ioctl.

Now that it doesn't need to find the struct v3d_bos, it can just take the
normal v3d_ioctl() path.

6 years agov3d: Maintain a mapping of the GEM buffer in the simulator.
Eric Anholt [Fri, 2 Nov 2018 18:43:27 +0000 (11:43 -0700)]
v3d: Maintain a mapping of the GEM buffer in the simulator.

This way we don't need to reach back into the gallium driver code to get
the mapping.

6 years agomeson: link gallium nine with pthreads
Dylan Baker [Thu, 1 Nov 2018 21:12:57 +0000 (14:12 -0700)]
meson: link gallium nine with pthreads

In some cases (not building with llvm, which automatically pulls in
pthreads) nine needs to be directly linked with pthreads. Fixes building
on x86 (32 bit) without llvm.

Distro bug: https://bugs.gentoo.org/670094
Fixes: 6b4c7047d57178d3362a710ad503057c6a582ca3
       ("meson: build gallium nine state_tracker")
Tested-by: Rafal Lalik <rafallalik@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
6 years agoanv/icl: Disable prefetching of sampler state entries
Anuj Phogat [Wed, 24 Oct 2018 18:35:42 +0000 (11:35 -0700)]
anv/icl: Disable prefetching of sampler state entries

WA_1606682166:
Incorrect TDL's SSP address shift in SARB for 16:6 & 18:8 modes.
Disable the Sampler state prefetch functionality in the SARB by
programming 0xB000[30] to '1'. This is to be done at boot time and
the feature must remain disabled permanently.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
6 years agoi965/icl: Disable prefetching of sampler state entries
Topi Pohjolainen [Wed, 24 Oct 2018 18:33:53 +0000 (11:33 -0700)]
i965/icl: Disable prefetching of sampler state entries

In the same spirit as commit a5889d70f2074201ceaeac4f96a9a0c0b1f68a31
"i965/icl: Disable binding table prefetching". Fixes some 110+
intermittent piglit failures with tex-miplevel-selection variants.

WA_1606682166:
Incorrect TDL's SSP address shift in SARB for 16:6 & 18:8 modes.
Disable the Sampler state prefetch functionality in the SARB by
programming 0xB000[30] to '1'. This is to be done at boot time and
the feature must remain disabled permanently.

Anuj: Set SamplerCount = 0 for vs, gs, hs, ds and wm units as well.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Cc: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
6 years agoamd: Make vgpr-spilling depend on llvm version
Jan Vesely [Thu, 1 Nov 2018 18:30:08 +0000 (14:30 -0400)]
amd: Make vgpr-spilling depend on llvm version

The option was removed in LLVM r345763

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
6 years agonir: fix condition propagation when src has a swizzle
Timothy Arceri [Fri, 2 Nov 2018 11:10:36 +0000 (22:10 +1100)]
nir: fix condition propagation when src has a swizzle

We cannot use nir_build_alu() to create the new alu as it has no
way to know how many components of the src we will use. This
results in it guessing the max number of components from one of
its inputs.

Fixes the following CTS tests:

dEQP-VK.spirv_assembly.instruction.graphics.selection_block_order.out_of_order_frag
dEQP-VK.spirv_assembly.instruction.graphics.selection_block_order.out_of_order_geom
dEQP-VK.spirv_assembly.instruction.graphics.selection_block_order.out_of_order_tessc
dEQP-VK.spirv_assembly.instruction.graphics.selection_block_order.out_of_order_vert

Fixes: 2975422ceb6c ("nir: propagates if condition evaluation down some alu chains")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
6 years agoandroid: gallium/auxiliary: add include to get u_debug.h header
Mauro Rossi [Wed, 31 Oct 2018 14:53:21 +0000 (15:53 +0100)]
android: gallium/auxiliary: add include to get u_debug.h header

To avoid build error in u_debug_stack_android.cpp
due to now missing u_debug.h header:

external/mesa/src/gallium/auxiliary/util/u_debug_stack_android.cpp:26:10:
fatal error: 'u_debug.h' file not found
#include "u_debug.h"
         ^
1 error generated.

Fixes: 37db383abb ("util: Move u_debug to utils")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
6 years agovirgl/vtest-winsys: Use virgl version of bind flags
Gert Wollny [Thu, 1 Nov 2018 09:49:58 +0000 (10:49 +0100)]
virgl/vtest-winsys: Use virgl version of bind flags

The bind flags defined by mesa/gallium might not always be in sync
with the ones copied to virglrenderer/gallium. Therefore, use the
flags defined in virgl like it is done for all the other calls to
create resources.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
6 years agomesa/st: Add support for EXT_texture_sRGB_R8
Gert Wollny [Thu, 1 Nov 2018 11:59:26 +0000 (12:59 +0100)]
mesa/st: Add support for EXT_texture_sRGB_R8

This only adds support on the Gallium core level, for the drivers
it is likely that additional changes are needed to support the
new texture format and thereby enabling the extension.

Enables on softpipe and makes pass:
  dEQP-GLES31.functional.srgb_texture_decode.skip_decode.sr8.*

v2: - add include for getting GL_SR8_EXT
v4: - since the extension is not required don't bother providing
      a fallback (Ilia Mirkin)
    - split patch (2/2) to separate Gallium and mesa/st parts
      (Roland Scheidegger)
    - trim commit message to only contain the history of the patch
      relevant to this part
v5: - don't include GLES headers (required enum has been added to glheader.h)
      (Ilia Mirkin)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
6 years agoGallium: Add format PIPE_FORMAT_R8_SRGB
Gert Wollny [Thu, 1 Nov 2018 11:59:25 +0000 (12:59 +0100)]
Gallium: Add format PIPE_FORMAT_R8_SRGB

This format is needed to support EXT_texture_sRGB_R8. THe patch adds a new
format enum, the format entries in Gallium and and svga, the mapping between
sRGB and linear formats, and tests.

  v2: - add mapping to linear format for PIPE_FORMATR_R8_SRGB
  v3: - Add texture format to svga format table since otherwise building
        mesa will fail when this driver is enabled. It was not tested
        whether the extension actually works.
  v4: - svga: remove the SVGA specific format definitions and table entries
        and only add correct the location of PIPE_FORMAT_R8_SRGB in the
        format_conversion_table (Ilia Mirkin)
      - Split patch (1/2) to separate Gallium part and mesa/st part.
        (Roland Scheidegger)
      - Trim the commit message to only contain the relevant parts from the
        split.
  v5: - svga: correct location of PIPE_FORMAT_SRGB_R8 (Ilia Mirkin)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
6 years agomesa/core: Add definitions and translations for EXT_texture_sRGB_R8
Gert Wollny [Thu, 1 Nov 2018 11:59:24 +0000 (12:59 +0100)]
mesa/core: Add definitions and translations for EXT_texture_sRGB_R8

v2: - fix format definition line
    - disable  for desktop GL
    - don't add GL_R8_EXT to glext.h since it is already in
      GLES2/gl2ext.h in glext.h and include this header  where needed
      (all Emil)
v3: - swrast: Fill the function table for sRGB_R8
      The size of the function table is checked at compile time and must
      correspond to the number of mesa texture formats.
      dri/swrast being gles-2.0 doesn't support the extension though
v4: - correct format layout comment (Ilia Mirkin)
    - correct logic for accepting GL_RED only textures (in part Ilia Mirkin)
      EXT_texture_sRGB_R8 requires OpenGL ES 3.0 which includes
      ARB_texture_rg/EXT_texture_rg, so one only must check for the first
      when SR8_EXT is really requested.
v5: - add define for GL_ES8_XT to glheader.h and don't include GLES
      headers  (Ilia Mirkin)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
6 years agoglsl: do not allow implicit casts of unsized array initializers
Erik Faye-Lund [Thu, 25 Oct 2018 19:33:52 +0000 (21:33 +0200)]
glsl: do not allow implicit casts of unsized array initializers

The GLSL 4.6 specification (section 4.1.14. "Implicit Conversions")
says:

  "There are no implicit array or structure conversions. For
   example, an array of int cannot be implicitly converted to an
   array of float."

So let's add a check in place when assigning array initializers to
implicitly sized arrays, to avoid incorrectly allowing code on the
form:

int[] foo = float[](1.0, 2.0, 3.0)

This fixes the following dEQP test-cases:
- dEQP-GLES31.functional.shaders.implicit_conversions.es31.invalid.arrays.int_to_float_vertex
- dEQP-GLES31.functional.shaders.implicit_conversions.es31.invalid.arrays.int_to_float_fragment
- dEQP-GLES31.functional.shaders.implicit_conversions.es31.invalid.arrays.int_to_uint_vertex
- dEQP-GLES31.functional.shaders.implicit_conversions.es31.invalid.arrays.int_to_uint_fragment
- dEQP-GLES31.functional.shaders.implicit_conversions.es31.invalid.arrays.uint_to_float_vertex
- dEQP-GLES31.functional.shaders.implicit_conversions.es31.invalid.arrays.uint_to_float_fragment
- dEQP-GLES31.functional.shaders.implicit_conversions.es32.invalid.arrays.int_to_float_vertex
- dEQP-GLES31.functional.shaders.implicit_conversions.es32.invalid.arrays.int_to_float_fragment
- dEQP-GLES31.functional.shaders.implicit_conversions.es32.invalid.arrays.int_to_uint_vertex
- dEQP-GLES31.functional.shaders.implicit_conversions.es32.invalid.arrays.int_to_uint_fragment
- dEQP-GLES31.functional.shaders.implicit_conversions.es32.invalid.arrays.uint_to_float_vertex
- dEQP-GLES31.functional.shaders.implicit_conversions.es32.invalid.arrays.uint_to_float_fragment

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
6 years agomesa/glsl: add support for EXT_shader_implicit_conversions
Erik Faye-Lund [Thu, 25 Oct 2018 14:40:13 +0000 (16:40 +0200)]
mesa/glsl: add support for EXT_shader_implicit_conversions

EXT_shader_implicit_conversions adds support for implicit conversions
for GLES 3.1 and above.

This is essentially a subset of ARB_gpu_shader5, and augments
OES_gpu_shader5.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
6 years agoglsl: fall back to inexact function-match
Erik Faye-Lund [Tue, 30 Oct 2018 14:15:58 +0000 (15:15 +0100)]
glsl: fall back to inexact function-match

In GLES, we currently either need an exact match with a local function,
or an exact match with a builtin.

However, if we add support for implicit conversions for GLES shaders,
we also need to fall back to a non-exact match in the case where there
were no builtin match either.

Luckily, we already have a variable ready with this, so let's just
return it if the builtin-search failed.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
6 years agoglsl: add has_implicit_uint_to_int_conversion()-helper
Erik Faye-Lund [Thu, 25 Oct 2018 14:01:00 +0000 (16:01 +0200)]
glsl: add has_implicit_uint_to_int_conversion()-helper

This makes the code a bit easier to read, as well as reduces repetition,
especially when we add support for EXT_shader_implicit_conversions.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
6 years agoglsl: add has_implicit_conversions()-helper
Erik Faye-Lund [Thu, 25 Oct 2018 14:00:14 +0000 (16:00 +0200)]
glsl: add has_implicit_conversions()-helper

This makes the code a bit easier to read, as well as will reduce
repetition when we add support for EXT_shader_implicit_conversions.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
6 years agomesa: Remove needless indirection in some draw functions.
Mathias Fröhlich [Thu, 1 Nov 2018 06:25:42 +0000 (07:25 +0100)]
mesa: Remove needless indirection in some draw functions.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
6 years agonir: allow propagation of if evaluation for bcsel
Timothy Arceri [Thu, 1 Nov 2018 21:53:16 +0000 (08:53 +1100)]
nir: allow propagation of if evaluation for bcsel

Shader-db results Skylake:

total instructions in shared programs: 13109035 -> 13109024 (<.01%)
instructions in affected programs: 4777 -> 4766 (-0.23%)
helped: 11
HURT: 0

total cycles in shared programs: 332090418 -> 332090443 (<.01%)
cycles in affected programs: 19474 -> 19499 (0.13%)
helped: 6
HURT: 4

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
6 years agoradv: fix begin/end transform feedback with 0 counter buffers.
Dave Airlie [Wed, 31 Oct 2018 23:55:29 +0000 (23:55 +0000)]
radv: fix begin/end transform feedback with 0 counter buffers.

If the user gives 0 counterBuffers then the driver should still
enable transform feedback on all targets. This changes the
driver to always enable xfb, and use counter buffers where
one is defined for the target in question.

Fixes: b4eb029062 (radv: implement VK_EXT_transform_feedback)
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
6 years agoradv: apply xfb buffer offset at buffer binding time not later. (v2)
Dave Airlie [Wed, 31 Oct 2018 23:38:20 +0000 (23:38 +0000)]
radv: apply xfb buffer offset at buffer binding time not later. (v2)

In order to handle pause/resume properly, the offset should
be added to the buffer binding not to the begin/end paths.

v2: don't add offset to size
Fixes ext_transform_feedback-alignment* under zink

Fixes: b4eb029062 (radv: implement VK_EXT_transform_feedback)
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
6 years agoRevert "i965/batch: avoid reverting batch buffer if saved state is an empty"
Mark Janes [Thu, 1 Nov 2018 22:44:45 +0000 (15:44 -0700)]
Revert "i965/batch: avoid reverting batch buffer if saved state is an empty"

This reverts commit a9031bf9b55602d93cccef6c926e2179c23205b4.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108630

6 years agovc4: Drop the winsys_stride relayout in the simluator
Eric Anholt [Thu, 1 Nov 2018 21:34:02 +0000 (14:34 -0700)]
vc4: Drop the winsys_stride relayout in the simluator

Since 0c1dd9dee0da ("broadcom/vc4: Allow importing linear BOs with
arbitrary offset/stride."), we have the vc4-side BO properly laid out
(assuming it's linear) in the winsys BO so that we can skip this extra
copy.

6 years agov3d: Update the TLB config for depth writes on V3D 4.2.
Eric Anholt [Tue, 30 Oct 2018 19:17:00 +0000 (12:17 -0700)]
v3d: Update the TLB config for depth writes on V3D 4.2.

Fixes 311 piglit cases on the simulator.

6 years agov3d: Use the TLB R/B swapping instead of recompiles when available.
Eric Anholt [Mon, 10 Sep 2018 15:19:48 +0000 (08:19 -0700)]
v3d: Use the TLB R/B swapping instead of recompiles when available.

The recompile reduction is nice, but this also makes it so that a straight
texture copy could get optimized some day to not unpack/repack the f16
values.

6 years agov3d: Take advantage of _mesa_hash_table_remove_key() in the simulator.
Eric Anholt [Thu, 1 Nov 2018 19:22:05 +0000 (12:22 -0700)]
v3d: Take advantage of _mesa_hash_table_remove_key() in the simulator.

6 years agov3d: Respect user-passed strides for BO imports.
Eric Anholt [Thu, 1 Nov 2018 19:15:25 +0000 (12:15 -0700)]
v3d: Respect user-passed strides for BO imports.

If the caller has passed in a stride for (linear) BO import, we should use
that stride when rendering to the BO (or, if we some day support texturing
from linear-imported BOs, when doing the linear-to-UIF shadow copy).  This
lets us remove the extra stride-changing relayout in the simulator.

6 years agov3d: Drop #if 0-ed out v3d_dump_to_file().
Eric Anholt [Thu, 1 Nov 2018 19:04:33 +0000 (12:04 -0700)]
v3d: Drop #if 0-ed out v3d_dump_to_file().

This came from vc4, where we had a file format for GPU hangs.  I don't
have one of those for V3D, and I probably won't ever have the simulator
side produce dumps even if I do.

6 years agov3d: Fix a typo in a comment in job handling.
Eric Anholt [Thu, 1 Nov 2018 18:57:40 +0000 (11:57 -0700)]
v3d: Fix a typo in a comment in job handling.

6 years agov3d: Fix a copy-and-paste comment in the simulator code.
Eric Anholt [Thu, 1 Nov 2018 18:42:18 +0000 (11:42 -0700)]
v3d: Fix a copy-and-paste comment in the simulator code.

6 years agoanv/icl: Set Error Detection Behavior Control Bit in L3CNTLREG
Anuj Phogat [Fri, 12 Oct 2018 21:12:50 +0000 (14:12 -0700)]
anv/icl: Set Error Detection Behavior Control Bit in L3CNTLREG

The default setting of this bit is not the desirable behavior.
WA_1406697149

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
6 years agoi965/icl: Set Error Detection Behavior Control Bit in L3CNTLREG
Anuj Phogat [Tue, 2 Oct 2018 16:10:04 +0000 (09:10 -0700)]
i965/icl: Set Error Detection Behavior Control Bit in L3CNTLREG

The default setting of this bit is not the desirable behavior.
WA_1406697149

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
6 years agodocs: add 19.0.0-devel release notes template
Emil Velikov [Thu, 1 Nov 2018 18:56:54 +0000 (18:56 +0000)]
docs: add 19.0.0-devel release notes template

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
6 years agomesa: bump version to 19.1.0-devel
Emil Velikov [Thu, 1 Nov 2018 18:50:49 +0000 (18:50 +0000)]
mesa: bump version to 19.1.0-devel

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
6 years agomeson: don't install translation files
Dylan Baker [Thu, 1 Nov 2018 16:02:39 +0000 (09:02 -0700)]
meson: don't install translation files

Tested-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Fixes: 7834926a4f5ca0a60ec3d18c87a1e0a68b615820
       ("meson: add support for generating translation mo files")

6 years agoegl: use the LC_ALL hammer instead of LANG
Eric Engestrom [Thu, 1 Nov 2018 16:40:28 +0000 (16:40 +0000)]
egl: use the LC_ALL hammer instead of LANG

Some environment (like Travis apparently) set LC_* vars, messing up the
sort ordering, so let's use envvar with the highest priority to make
sure this is actually sorted in ASCII order.

Suggested-by: Michel Dänzer <michel@daenzer.net>
Fixes: b42dc50a5f1b22103b26 "egl: fix entrypoint sorting test"
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
6 years agoegl: fix entrypoint sorting test
Eric Engestrom [Thu, 1 Nov 2018 15:33:35 +0000 (15:33 +0000)]
egl: fix entrypoint sorting test

Fixes: 68dc591af16ebb36814e "egl: Fix eglentrypoint.h sort order."
Cc: Emil Velikov <emil.l.velikov@gmail.com>
Cc: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
6 years agointel/tools: fix resource leak
Andrii Simiklit [Fri, 26 Oct 2018 14:29:34 +0000 (17:29 +0300)]
intel/tools: fix resource leak

Some memory and file descriptors are not freed/closed.

v2: fixed case where we skipped the 'aub' variable initialization

Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
6 years agointel/tools: include stdarg.h in error2aub
Jonathan Gray [Thu, 1 Nov 2018 04:07:32 +0000 (15:07 +1100)]
intel/tools: include stdarg.h in error2aub

Include stdarg.h in error2aub.c otherwise it fails to build on
OpenBSD due to not finding definitions for va_list va_start va_end.

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
6 years agoegl: Fix eglentrypoint.h sort order.
Mathias Fröhlich [Thu, 1 Nov 2018 06:23:06 +0000 (07:23 +0100)]
egl: Fix eglentrypoint.h sort order.

Fixes a make check failure.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108617
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
6 years agoradv: set PA_SU_PRIM_FILTER_CNTL optimally
Samuel Pitoiset [Mon, 29 Oct 2018 10:37:03 +0000 (11:37 +0100)]
radv: set PA_SU_PRIM_FILTER_CNTL optimally

Ported from RadeonSI. It's always TRUE for CIK+ because RADV
doesn't support 16 samples.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
6 years agoradv: only enable gl_SampleMask if MSAA is enabled too
Samuel Pitoiset [Mon, 29 Oct 2018 10:37:02 +0000 (11:37 +0100)]
radv: only enable gl_SampleMask if MSAA is enabled too

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
6 years agoradv: use radeon_info::num_good_cu_per_sh
Samuel Pitoiset [Mon, 29 Oct 2018 10:37:01 +0000 (11:37 +0100)]
radv: use radeon_info::num_good_cu_per_sh

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
6 years agoac/nir: make use of i1false in few more places
Samuel Pitoiset [Mon, 29 Oct 2018 16:05:15 +0000 (17:05 +0100)]
ac/nir: make use of i1false in few more places

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
6 years agoradv: add support for Raven2
Samuel Pitoiset [Tue, 30 Oct 2018 10:52:37 +0000 (11:52 +0100)]
radv: add support for Raven2

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
6 years agomesa: Collect all the draw functions in draw.{h,c}.
Mathias Fröhlich [Mon, 29 Oct 2018 05:13:20 +0000 (06:13 +0100)]
mesa: Collect all the draw functions in draw.{h,c}.

Some of these functions were distributed across different
implementation and header files. Put them at a central place.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
6 years agomesa/vbo: Move _vbo_draw_indirect -> _mesa_draw_indirect
Mathias Fröhlich [Mon, 29 Oct 2018 05:13:20 +0000 (06:13 +0100)]
mesa/vbo: Move _vbo_draw_indirect -> _mesa_draw_indirect

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
6 years agomesa/vbo: Move src/mesa/vbo/vbo_exec_array.c -> src/mesa/main/draw.c
Mathias Fröhlich [Mon, 29 Oct 2018 05:13:20 +0000 (06:13 +0100)]
mesa/vbo: Move src/mesa/vbo/vbo_exec_array.c -> src/mesa/main/draw.c

The array type draw is no longer directly dependent on the vbo module.
Thus move array type draws into mesa/main/draw.c.
Rename symbols starting with vbo_* to _mesa_* and apply some
reindenting to make it consistent.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
6 years agovbo: Pull the _mesa_set_draw_vao calls out of the if clauses.
Mathias Fröhlich [Mon, 29 Oct 2018 05:13:19 +0000 (06:13 +0100)]
vbo: Pull the _mesa_set_draw_vao calls out of the if clauses.

These calls are just the same in each if branch. So pull that
before the if.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
6 years agovbo: Preserve vbo_save::no_current_update on primitive restart.
Mathias Fröhlich [Mon, 29 Oct 2018 05:13:19 +0000 (06:13 +0100)]
vbo: Preserve vbo_save::no_current_update on primitive restart.

With this change we preserve the no_current_update property when we
observe a glPrimitiveRestart call. That means that we now also get the
no_current_update optimization for display lists that are made
out of indexed draws using primitive restart.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
6 years agovbo: Make no_current_update an argument to vbo_save_NotifyBegin.
Mathias Fröhlich [Mon, 29 Oct 2018 05:13:19 +0000 (06:13 +0100)]
vbo: Make no_current_update an argument to vbo_save_NotifyBegin.

Instead of coding additional information into the primitive
mode, make the only remaining flag there a direct argument to
vbo_save_NotifyBegin.

v2: Fix incorrect no_current_update in glRectf.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
6 years agovbo: Move no_current_update out of _mesa_prim.
Mathias Fröhlich [Mon, 29 Oct 2018 05:13:19 +0000 (06:13 +0100)]
vbo: Move no_current_update out of _mesa_prim.

The _mesa_prim::no_current_update flag should tell the compiled
display list if the current attributes that are placed in the dlists
vbo shall take a defined state past replay of a display list.
Immediate mode draws compiled into display lists should set the
current values. Array draws may leave the current values in
undefined state.
So finally this flag is not a property of every primitive
but it is a property of the compiled display list and there it
is a property of the last primitive compiled into the list.
So move the flag out of _mesa_prim into vbo_save.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
6 years agovbo: Remove the now unused VBO_SAVE_PRIM_WEAK define.
Mathias Fröhlich [Mon, 29 Oct 2018 05:13:19 +0000 (06:13 +0100)]
vbo: Remove the now unused VBO_SAVE_PRIM_WEAK define.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
6 years agovbo: Remove the always false branch dlist replay.
Mathias Fröhlich [Mon, 29 Oct 2018 05:13:19 +0000 (06:13 +0100)]
vbo: Remove the always false branch dlist replay.

The previous patch left a constant if (0) in the code.
Clean that up now.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
6 years agovbo: Test for VBO_SAVE_PRIM_WEAK in _mesa_prim::mode is false.
Mathias Fröhlich [Mon, 29 Oct 2018 05:13:19 +0000 (06:13 +0100)]
vbo: Test for VBO_SAVE_PRIM_WEAK in _mesa_prim::mode is false.

When setting the _mesa_prim::mode field we always filter out
all non OpenGL primitive mode bits. So this tested bit cannot be
there anymore and the test evaluates to zero.
The zero is removed with the next patch to ease review.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
6 years agovbo: Remove VBO_SAVE_PRIM_WEAK from vbo_save_NotifyBegin calls.
Mathias Fröhlich [Mon, 29 Oct 2018 05:13:19 +0000 (06:13 +0100)]
vbo: Remove VBO_SAVE_PRIM_WEAK from vbo_save_NotifyBegin calls.

Now looking at the implementation of vbo_save_NotifyBegin.
The VBO_SAVE_PRIM_WEAK flag, delivered in the primitive mode
argument to vbo_save_NotifyBegin, is not evaluated anymore.
The two users of the mode argument are the primitive mode
itself, where the VBO_SAVE_PRIM_WEAK bit is masked out to
retrieve the underlying OpenGL primitive mode. The other
user is to check for the VBO_SAVE_PRIM_NO_CURRENT_UPDATE bit
which is different from VBO_SAVE_PRIM_WEAK.
So, since vbo_save_NotifyBegin does not care about
VBO_SAVE_PRIM_WEAK, we can savely remove it from the call
arguments of vbo_save_NotifyBegin.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>