Andrey Miroshnikov [Mon, 13 Dec 2021 21:27:53 +0000 (21:27 +0000)]
Refactored jtag sim test, made four basic test cases (no asserts yet).
Andrey Miroshnikov [Sat, 11 Dec 2021 22:47:41 +0000 (22:47 +0000)]
Added bs addr for different test modes, still need to add comprehensive tests for both connected/disconnected core/pad
Andrey Miroshnikov [Fri, 10 Dec 2021 22:47:10 +0000 (22:47 +0000)]
Figured out how to send jtag bs stream, and how to read, now need to add asserts.
Andrey Miroshnikov [Thu, 9 Dec 2021 20:23:22 +0000 (20:23 +0000)]
Tried using other jtag_ commands, still need some extra config to fill shift reg
Andrey Miroshnikov [Thu, 9 Dec 2021 13:13:13 +0000 (13:13 +0000)]
Added DMI and WB code from test_jtag_tap, basic pad/core toggling not working yet
Andrey Miroshnikov [Tue, 7 Dec 2021 22:56:21 +0000 (22:56 +0000)]
Changed jtag function imports to use test_jtag_tap, pad/core pin toggling not working yet
Andrey Miroshnikov [Tue, 7 Dec 2021 18:46:16 +0000 (18:46 +0000)]
Solved one issue, found another. See bug #50 c#72
Andrey Miroshnikov [Tue, 7 Dec 2021 18:33:28 +0000 (18:33 +0000)]
Added jtag bs core/pad toggling, not working yet
Andrey Miroshnikov [Tue, 7 Dec 2021 17:21:01 +0000 (17:21 +0000)]
Removed redunant jtag files that already reside in soc repo
Andrey Miroshnikov [Mon, 6 Dec 2021 22:31:21 +0000 (22:31 +0000)]
Started working on jtag bs chain test
Luke Kenneth Casson Leighton [Mon, 6 Dec 2021 19:29:08 +0000 (19:29 +0000)]
get access to jtag boundary scan pads for uart_0_tx/rx
Andrey Miroshnikov [Mon, 6 Dec 2021 18:30:31 +0000 (18:30 +0000)]
added i2c/uart prints to the debug test
Andrey Miroshnikov [Mon, 6 Dec 2021 15:02:09 +0000 (15:02 +0000)]
Added I2C test based on the UART and GPIO tests
Andrey Miroshnikov [Mon, 6 Dec 2021 10:23:32 +0000 (10:23 +0000)]
Basic UART test working
Andrey Miroshnikov [Fri, 3 Dec 2021 23:48:18 +0000 (23:48 +0000)]
Starting to write UART test
Andrey Miroshnikov [Fri, 3 Dec 2021 19:48:46 +0000 (19:48 +0000)]
Unit test now covers i/o/oe. Extra debug prints moved to separate test case.
Andrey Miroshnikov [Fri, 3 Dec 2021 16:12:53 +0000 (16:12 +0000)]
Added assert test for all input oand gpio_o_test combinations.
Luke Kenneth Casson Leighton [Fri, 3 Dec 2021 11:16:35 +0000 (11:16 +0000)]
remove code trying to treat Pins/Resources as Signals/Records (again)
Andrey Miroshnikov [Fri, 3 Dec 2021 10:47:41 +0000 (10:47 +0000)]
Trying to read core input, possibly a pin again
Andrey Miroshnikov [Thu, 2 Dec 2021 23:03:06 +0000 (23:03 +0000)]
Added input toggling, still implementing
Andrey Miroshnikov [Thu, 2 Dec 2021 13:08:54 +0000 (13:08 +0000)]
Added asserts for gpios 2/3
Andrey Miroshnikov [Thu, 2 Dec 2021 12:53:17 +0000 (12:53 +0000)]
Moved main code under if __main__ statement for clarity.
Luke Kenneth Casson Leighton [Thu, 2 Dec 2021 12:18:47 +0000 (12:18 +0000)]
sort out mess of trying to access the Pin resource instead of the pad
it was connected to. faillllll
Andrey Miroshnikov [Thu, 2 Dec 2021 12:09:26 +0000 (12:09 +0000)]
Changed assert, TypeError occurring with pad output.
Andrey Miroshnikov [Wed, 1 Dec 2021 23:12:31 +0000 (23:12 +0000)]
GPIO output test waveforms working, asserts not working yet.
Andrey Miroshnikov [Wed, 1 Dec 2021 01:13:08 +0000 (01:13 +0000)]
In process of writing test case outlined in bug50 c#60, not finished
Andrey Miroshnikov [Tue, 30 Nov 2021 19:19:53 +0000 (19:19 +0000)]
Can control gpio input via resource_table_pads
Luke Kenneth Casson Leighton [Mon, 29 Nov 2021 22:25:36 +0000 (22:25 +0000)]
more messing about
Luke Kenneth Casson Leighton [Mon, 29 Nov 2021 22:15:35 +0000 (22:15 +0000)]
bit of exploration
Luke Kenneth Casson Leighton [Mon, 29 Nov 2021 21:47:24 +0000 (21:47 +0000)]
testing comments
Andrey Miroshnikov [Mon, 29 Nov 2021 21:41:35 +0000 (21:41 +0000)]
GPIO o/oe can be controlled for unit testing, still need to figure out inputs.
Andrey Miroshnikov [Mon, 29 Nov 2021 21:07:54 +0000 (21:07 +0000)]
Able to control gpio oe signal, not properly though.
Luke Kenneth Casson Leighton [Mon, 29 Nov 2021 17:19:05 +0000 (17:19 +0000)]
add gpio and start doing print-outs to find out what is in Blinker.gpio
Andrey Miroshnikov [Mon, 29 Nov 2021 16:44:04 +0000 (16:44 +0000)]
Returned code I removed, fixed my test case, added example test from cesar. Can't figure out signal names to drive.
Andrey Miroshnikov [Mon, 29 Nov 2021 14:51:35 +0000 (14:51 +0000)]
Test case 0 for sanity, not working
Luke Kenneth Casson Leighton [Mon, 29 Nov 2021 12:44:20 +0000 (12:44 +0000)]
add pinmux docs
Luke Kenneth Casson Leighton [Sun, 28 Nov 2021 20:38:36 +0000 (20:38 +0000)]
move prototype / proof-of-concept code from ASICPlatform / Blinker test
into actual JTAG class. start tidyup
Luke Kenneth Casson Leighton [Sun, 28 Nov 2021 16:46:25 +0000 (16:46 +0000)]
turn bi-directional GPIO pads back into triplet independent
i/o/oe pads
Luke Kenneth Casson Leighton [Sun, 28 Nov 2021 16:30:22 +0000 (16:30 +0000)]
connect up Platform resources to pads
Luke Kenneth Casson Leighton [Sun, 28 Nov 2021 15:10:15 +0000 (15:10 +0000)]
take record of boundary scan pads to make a set of ports for rtlil
Luke Kenneth Casson Leighton [Sun, 28 Nov 2021 15:02:16 +0000 (15:02 +0000)]
add a core-mgr *and* a pad-mgr to JTAG class so that an *entire* set
of "resources" is connected inside the module... *outside* of the Platform.
the Platform then only needs a straight port-to-port connection *NOT*
"the Platform connects up JTAG Boundary Scan"
Luke Kenneth Casson Leighton [Sun, 28 Nov 2021 13:20:12 +0000 (13:20 +0000)]
reworking IO, morphing to make JTAG independent of Platform.build()
Luke Kenneth Casson Leighton [Sun, 28 Nov 2021 11:22:42 +0000 (11:22 +0000)]
move padlookup into JTAG class (hacked at the moment)
Luke Kenneth Casson Leighton [Sun, 28 Nov 2021 11:22:27 +0000 (11:22 +0000)]
move pin-adding into separate function in JTAG class
Luke Kenneth Casson Leighton [Sun, 28 Nov 2021 11:13:13 +0000 (11:13 +0000)]
move ResourceManager into JTAG object, rename it to core_mgr
Luke Kenneth Casson Leighton [Sat, 27 Nov 2021 23:50:33 +0000 (23:50 +0000)]
double-inversion
Luke Kenneth Casson Leighton [Sat, 27 Nov 2021 18:26:06 +0000 (18:26 +0000)]
add JTAG IO pads out
Luke Kenneth Casson Leighton [Sat, 27 Nov 2021 17:42:46 +0000 (17:42 +0000)]
sort out ordering of modules
Andrey Miroshnikov [Mon, 22 Nov 2021 15:16:11 +0000 (15:16 +0000)]
Added iotype comment l18
Luke Kenneth Casson Leighton [Sat, 20 Nov 2021 00:48:09 +0000 (00:48 +0000)]
add ASICPlatform override of toolchain_prepare and some notes
Andrey Miroshnikov [Fri, 19 Nov 2021 20:25:26 +0000 (20:25 +0000)]
copied more code, still broken
Andrey Miroshnikov [Fri, 19 Nov 2021 20:10:18 +0000 (20:10 +0000)]
Added code from jtag srv test, not working
Andrey Miroshnikov [Fri, 19 Nov 2021 11:40:24 +0000 (11:40 +0000)]
Edited to use soc imports, not working
Andrey Miroshnikov [Thu, 18 Nov 2021 22:53:25 +0000 (22:53 +0000)]
Added jtagutils and openpower state dependency for borrowed jtag test cases, see bug #50
Andrey Miroshnikov [Thu, 18 Nov 2021 20:25:31 +0000 (20:25 +0000)]
Added more dependencies, but there's a hiccup with another dependency...
Andrey Miroshnikov [Thu, 18 Nov 2021 12:46:02 +0000 (12:46 +0000)]
Adding JTAG server/client copy from soc repo, still need more fixes
Andrey Miroshnikov [Wed, 17 Nov 2021 13:27:42 +0000 (13:27 +0000)]
Copying jtag test file from soc repo
Andrey Miroshnikov [Tue, 16 Nov 2021 21:32:31 +0000 (21:32 +0000)]
Added comb logic for get_input_output
Luke Kenneth Casson Leighton [Tue, 16 Nov 2021 00:51:03 +0000 (00:51 +0000)]
aiyaaaargh, re-route data through pad/core ports, no idea what to do
Luke Kenneth Casson Leighton [Tue, 16 Nov 2021 00:36:17 +0000 (00:36 +0000)]
add intermediary signal to track things down
Luke Kenneth Casson Leighton [Tue, 16 Nov 2021 00:31:24 +0000 (00:31 +0000)]
wooow totally ridiculously complicated. forgot that pad resources
have their own pin which of course needs connecting as well
Luke Kenneth Casson Leighton [Mon, 15 Nov 2021 23:40:05 +0000 (23:40 +0000)]
okaaaay i worked out how to do bi-directional IO:
create a width of 3, and have the 3 pins named i, o and oe
Andrey Miroshnikov [Mon, 15 Nov 2021 22:11:58 +0000 (22:11 +0000)]
Removed tribuf from get_tristate, not working, see bug #50
Andrey Miroshnikov [Mon, 15 Nov 2021 19:08:23 +0000 (19:08 +0000)]
Added get_tristate JTAG connection
Andrey Miroshnikov [Mon, 15 Nov 2021 18:18:24 +0000 (18:18 +0000)]
Added get_input_output, will add diagram on wiki later. Demo hasn't used it yet.
Andrey Miroshnikov [Mon, 15 Nov 2021 17:48:15 +0000 (17:48 +0000)]
Added get_output jtag connection
Andrey Miroshnikov [Mon, 15 Nov 2021 17:40:17 +0000 (17:40 +0000)]
PEP8
Luke Kenneth Casson Leighton [Mon, 15 Nov 2021 17:28:53 +0000 (17:28 +0000)]
whoops syntax error
Luke Kenneth Casson Leighton [Mon, 15 Nov 2021 17:25:23 +0000 (17:25 +0000)]
tidyup
Luke Kenneth Casson Leighton [Mon, 15 Nov 2021 17:22:18 +0000 (17:22 +0000)]
sort out pad/core link
Andrey Miroshnikov [Mon, 15 Nov 2021 17:05:51 +0000 (17:05 +0000)]
Added comb routing to get_input, not working yet
Luke Kenneth Casson Leighton [Mon, 15 Nov 2021 14:20:53 +0000 (14:20 +0000)]
add some print statements and comments explaining what the heck is going on
Luke Kenneth Casson Leighton [Mon, 15 Nov 2021 14:15:01 +0000 (14:15 +0000)]
redo JTAG to not use Pins clas, it is by pinspec
not by resources
therefore forget Pins class and wire up jtag IOConn directly by calling
C4MJTAG.add_io() directly
next step is to wire up the Shift Register stuff
Luke Kenneth Casson Leighton [Mon, 15 Nov 2021 13:34:03 +0000 (13:34 +0000)]
replace DummyPlatform with ASICPlatform
Luke Kenneth Casson Leighton [Mon, 15 Nov 2021 10:51:57 +0000 (10:51 +0000)]
reduce GPIO down to 4
Luke Kenneth Casson Leighton [Sun, 14 Nov 2021 19:40:51 +0000 (19:40 +0000)]
getting microtest to work again (adapting json output)
Luke Kenneth Casson Leighton [Sun, 14 Nov 2021 19:22:58 +0000 (19:22 +0000)]
move json creation to separate file
Luke Kenneth Casson Leighton [Sun, 14 Nov 2021 19:19:26 +0000 (19:19 +0000)]
sort out JSON function missing and get mapping working
Luke Kenneth Casson Leighton [Sun, 14 Nov 2021 19:13:19 +0000 (19:13 +0000)]
add missing clock to I2S pinfunction
Luke Kenneth Casson Leighton [Sun, 14 Nov 2021 19:10:56 +0000 (19:10 +0000)]
python2 print conversion
Luke Kenneth Casson Leighton [Sun, 14 Nov 2021 16:48:17 +0000 (16:48 +0000)]
comments
Luke Kenneth Casson Leighton [Sun, 14 Nov 2021 16:45:40 +0000 (16:45 +0000)]
add a few more asserts just to be safe
Luke Kenneth Casson Leighton [Sun, 14 Nov 2021 16:42:33 +0000 (16:42 +0000)]
yargh, hook into PlatformManager.request() so that seamlessly a
duplicate pad manager request can be made, and, further, the ports analysed
in order to hook up the names between pads and core (padlookup)
this is much cleaner than having to allocate all resources in advance
in the constructur
Luke Kenneth Casson Leighton [Sun, 14 Nov 2021 15:25:41 +0000 (15:25 +0000)]
override Platform.add_resources() so as to be able to add
resources to the Boundary Scan pad_mgr
Luke Kenneth Casson Leighton [Sat, 13 Nov 2021 22:33:55 +0000 (22:33 +0000)]
code-morph to drop in a duplicate resource set, for the IO ring
Luke Kenneth Casson Leighton [Sat, 13 Nov 2021 22:10:15 +0000 (22:10 +0000)]
add JTAG module to test example
Luke Kenneth Casson Leighton [Sat, 13 Nov 2021 22:08:06 +0000 (22:08 +0000)]
cleanup jtag.py for demo/test purposes
Luke Kenneth Casson Leighton [Sat, 13 Nov 2021 22:04:48 +0000 (22:04 +0000)]
add first cut of jtag.py (from soc) to be cut down later
Luke Kenneth Casson Leighton [Sat, 13 Nov 2021 20:28:54 +0000 (20:28 +0000)]
add copies of get_input/output/etc to at least put in some prints
Luke Kenneth Casson Leighton [Sat, 13 Nov 2021 20:27:33 +0000 (20:27 +0000)]
add comments and GPIO pads with triplet of Pins i/o/oe
Luke Kenneth Casson Leighton [Sat, 13 Nov 2021 20:01:47 +0000 (20:01 +0000)]
hmmm experimenting with gpio directions
Luke Kenneth Casson Leighton [Sat, 13 Nov 2021 19:45:57 +0000 (19:45 +0000)]
add clock/reset to dummy platform, now sync domain exists
Luke Kenneth Casson Leighton [Sat, 13 Nov 2021 18:31:13 +0000 (18:31 +0000)]
mess about with resources a bit
Luke Kenneth Casson Leighton [Sat, 13 Nov 2021 18:10:02 +0000 (18:10 +0000)]
hooray got the output at least created in build/
Luke Kenneth Casson Leighton [Sat, 13 Nov 2021 18:06:12 +0000 (18:06 +0000)]
tidyup, got testing_stage1.py at least running
Andrey Miroshnikov [Sat, 13 Nov 2021 17:16:42 +0000 (17:16 +0000)]
Added resource function (not working yet)
Andrey Miroshnikov [Sat, 13 Nov 2021 09:23:21 +0000 (09:23 +0000)]
Added platform instantiation (missing import statement though)
Andrey Miroshnikov [Sat, 13 Nov 2021 08:53:23 +0000 (08:53 +0000)]
Adding stage1 test file
Andrey Miroshnikov [Mon, 8 Nov 2021 19:57:24 +0000 (19:57 +0000)]
Cloned create_sv for ngi_router svg scaling
Andrey Miroshnikov [Mon, 8 Nov 2021 19:53:15 +0000 (19:53 +0000)]
Added most of the peripherals, still a few more to add