Dongwon Kim [Thu, 27 Jun 2019 16:54:36 +0000 (09:54 -0700)]
iris: disable repacking for compression for applicable gen
set bit15 (Disable Repacking for Compression) of CACHE_MODE_0 register
if the gen attribute, 'disable_ccs_repack' is set.
Signed-off-by: Dongwon Kim <dongwon.kim@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Dongwon Kim [Thu, 27 Jun 2019 16:54:35 +0000 (09:54 -0700)]
i965: disable repacking for compression for applicable gen
set bit15 (Disable Repacking for Compression) of CACHE_MODE_0 register
if the gen attribute, 'disable_ccs_repack' is set.
Signed-off-by: Dongwon Kim <dongwon.kim@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Dongwon Kim [Thu, 27 Jun 2019 16:54:34 +0000 (09:54 -0700)]
intel: add disable_ccs_repack to gen_device_info
add a new attribute, 'disable_ccs_repack' to gen_device info, which
indicates whether repacking of components in certain pixel formats
before compression needs to be disabled to keep the compatibility
with decompression capability of display controller (gen11+)
Signed-off-by: Dongwon Kim <dongwon.kim@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Dongwon Kim [Thu, 27 Jun 2019 16:54:33 +0000 (09:54 -0700)]
intel/genxml: correct bit fields in CACHE_MODE_0 reg for gen11
correct bit fields information of CACHE_MODE_0 reg in current gen11.xml
Signed-off-by: Dongwon Kim <dongwon.kim@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Caio Marcelo de Oliveira Filho [Wed, 3 Jul 2019 19:10:43 +0000 (12:10 -0700)]
nir: print ptr_stride for deref_casts
Reviewed-by: Dave Airlie <airlied@redhat.com>
Caio Marcelo de Oliveira Filho [Sat, 8 Jun 2019 00:37:38 +0000 (17:37 -0700)]
anv: Advertise VK_EXT_shader_demote_to_helper_invocation
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Caio Marcelo de Oliveira Filho [Sat, 8 Jun 2019 06:08:04 +0000 (23:08 -0700)]
spirv: Implement SPV_EXT_demote_to_helper_invocation
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Caio Marcelo de Oliveira Filho [Fri, 7 Jun 2019 23:41:04 +0000 (16:41 -0700)]
spirv: Update the headers from latest Khronos master
This corresponds to
29c11140baaf9f7fdaa39a583672c556bf1795a1 in
https://github.com/KhronosGroup/SPIRV-Headers.
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Caio Marcelo de Oliveira Filho [Sat, 8 Jun 2019 06:06:27 +0000 (23:06 -0700)]
intel/fs: Implement "demote to helper invocation"
The "demote" intrinsic works like "discard" but don't change the
control flow, allowing derivative operations to work. This is the
semantics of D3D discard.
The "is_helper_invocation" intrinsic will return true for helper
invocations -- both the ones that started as helpers and the ones that
where demoted. This is needed to avoid changing the behavior of
gl_HelperInvocation which is an input (so not expected to change
during shader execution).
v2: Emit the discard jump and comment why it is safe. (Jason)
Rework the is_helper_invocation() that was stomping f0.1. (Jason)
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Caio Marcelo de Oliveira Filho [Sat, 8 Jun 2019 00:29:05 +0000 (17:29 -0700)]
nir: Add demote and is_helper_invocation intrinsics
From SPV_EXT_demote_to_helper_invocation. Demote will be implemented
as a variant of discard, so mark uses_discard if it is used.
v2: Add CAN_ELIMINATE flag to the new intrinsic. (Jason)
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Samuel Pitoiset [Mon, 8 Jul 2019 11:45:08 +0000 (13:45 +0200)]
radv: do not emit VGT_FLUSH on GFX10
We don't need it.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Connor Abbott [Fri, 17 May 2019 14:31:17 +0000 (16:31 +0200)]
ac/nir: Remove now-unused interp_deref handling
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Connor Abbott [Tue, 14 May 2019 11:29:52 +0000 (13:29 +0200)]
radeonsi/nir: Use NIR barycentric intrinsics
This is simpler than radv, since the driver_location is already assigned
for us.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Connor Abbott [Mon, 13 May 2019 14:28:58 +0000 (16:28 +0200)]
radeonsi/nir: Delete unreachable code
We always get gl_FragCoord as a system value, not a varying, so this is
never hit. We already set PIXEL_CENTER_INTEGER elsewhere.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Connor Abbott [Mon, 27 May 2019 15:48:42 +0000 (17:48 +0200)]
compiler: Add color system value
This is nice to have with radeonsi, where color varyings are handled
specially to avoid recompiles.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Connor Abbott [Fri, 10 May 2019 08:44:20 +0000 (10:44 +0200)]
radv: Use NIR barycentric intrinsics
We have to add a few lowering to deal with things that used to be dealt
with inline when creating inputs. We also move the code that fills out
the radv_shader_variant_info struct for linking purposes to
radv_shader.c, as it's no longer tied to the NIR->LLVM lowering.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Connor Abbott [Mon, 13 May 2019 08:55:07 +0000 (10:55 +0200)]
ac/nir: Implement barycentric intrinsics
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Connor Abbott [Tue, 14 May 2019 10:10:11 +0000 (12:10 +0200)]
intel/nir: Extract add_const_offset_to_base
Pretty much every driver using nir_lower_io_to_temporaries followed by
nir_lower_io is going to want this. In particular, radv and radeonsi in
the next commits.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Connor Abbott [Wed, 15 May 2019 16:48:25 +0000 (18:48 +0200)]
nir/lower_io_to_temporaries: Handle interpolation intrinsics
These weren't properly supported. This does pretty much the same thing
that the radv code did.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Connor Abbott [Wed, 15 May 2019 10:49:29 +0000 (12:49 +0200)]
nir: Avoid coalescing vars created by lower_io_to_temporaries
Right now nir_copy_prop_vars is effectively undoing
nir_lower_io_to_temporaries for inputs by propagating the original
variable through the copy created in lower_io_to_temporaries. A
theoretical variable coalescing pass would have the same issue with
output variables, although that doesn't exist yet. To fix this, add a
new bit to nir_variable, and disable copy propagation when it's set.
This doesn't seem to affect any drivers now, probably since since no one
uses lower_io_to_temporaries for inputs as well as copy_prop_vars, but
it will fix radv once we flip on lower_io_to_temporaries for fs inputs.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Connor Abbott [Fri, 17 May 2019 12:56:45 +0000 (14:56 +0200)]
nir: Return correct size in nir_assign_io_var_locations()
It was double-counting cases where multiple variables were assigned to
the same slot, and not handling the case where the last variable is a
compact variable.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Connor Abbott [Tue, 14 May 2019 12:08:46 +0000 (14:08 +0200)]
nir: Handle compact variables when assigning i/o locations
These are used in Vulkan for clip/cull distances, instead of the GLSL
lowering when the clip/cull arrays are shared.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Connor Abbott [Fri, 10 May 2019 08:18:12 +0000 (10:18 +0200)]
nir: Move st_nir_assign_var_locations() to common code
It isn't really doing anything Gallium-specific, and it's needed for
handling component packing, overlapping, etc.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Connor Abbott [Mon, 13 May 2019 13:39:54 +0000 (15:39 +0200)]
radv: Make FragCoord a sysval
load_fragcoord is already handled in common code for radeonsi, so we
don't need to do anything to handle it. However, there were some passes
creating NIR with the varying, so we switch them over to the sysval. In
the case of nir_lower_input_attachments which is used by both radv and
anv, we add handling for both until intel switches to using a sysval.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Connor Abbott [Mon, 13 May 2019 13:32:26 +0000 (15:32 +0200)]
spirv: Add an option for making FragCoord a sysval
On AMD, FragCoord should be a sysval because it is handled separately
from all the other inputs. We were already doing this in radeonsi, but
we weren't doing it with radv. It'll be much more annoying to handle
VARYING_SLOT_POS in fragment shaders when we let NIR lower FS inputs for
us, so here we add an option so that radv can get it as a system value.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Daniel Schürmann [Fri, 5 Apr 2019 09:01:39 +0000 (11:01 +0200)]
radv: Lower input attachments in NIR.
v2 (Connor)
- Fix warning in release mode using MAYBE_UNUSED
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Daniel Schürmann [Fri, 5 Apr 2019 08:52:31 +0000 (10:52 +0200)]
radv: Implement nir_intrinsic_load_layer_id().
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Daniel Schürmann [Wed, 3 Apr 2019 15:29:20 +0000 (17:29 +0200)]
anv,nir: Move lower_input_attachments pass from ANV to NIR.
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Dave Airlie [Mon, 8 Jul 2019 06:53:27 +0000 (16:53 +1000)]
radv/gfx10: don't emit PFP packets on ME.
This was done for all previous GPUs.
This fixes Talos Principle launch hangs.
Fixes: 7e43022e8c8 (radv/gfx10: add gfx10_cs_emit_cache_flush)
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Sun, 7 Jul 2019 17:32:29 +0000 (19:32 +0200)]
ac: select the GFX ring when halting waves with UMR on GFX10
GFX10 has two rings, so UMR want to know which one to halt.
Select the first one by default.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Bas Nieuwenhuizen [Sun, 7 Jul 2019 23:19:55 +0000 (01:19 +0200)]
radv/gfx10: Move NGG output handling outside of giant if-statement.
In merged shaders we put a big if around each shader, so both stages
can have a different number of threads. However, the NGG output code
still needs to run if the first shader is not executed.
This can happen when there are more gs threads than vs/es threads, or
when there are 0 es/vs threads (why? no clue).
Fixes: ee21bd7440c "radv/gfx10: implement NGG support (VS only)"
Reviewed-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Sun, 7 Jul 2019 21:03:33 +0000 (23:03 +0200)]
radv: Actually use VK formats for the format table.
No ETC2 or ASTC on navi so nothing to add.
Fixes: 3dc5ec5d167 "radv/gfx10: generate gfx10_format_table.h"
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Chia-I Wu [Sat, 6 Jul 2019 19:12:51 +0000 (12:12 -0700)]
anv: fix VkExternalBufferProperties for host allocation
It was reported as unsupported previously. It should be importable
and is compatible with itself.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Fixes: 69cc6272fbc199 ("anv: Implement VK_EXT_external_memory_host")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Chia-I Wu [Sat, 6 Jul 2019 19:02:51 +0000 (12:02 -0700)]
anv: fix VkExternalBufferProperties for unsupported handles
compatibleHandleTypes must include the queried handle type.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Bas Nieuwenhuizen [Sun, 7 Jul 2019 19:24:17 +0000 (21:24 +0200)]
radv: Handle cmask being disallowed by addrlib.
alignment=0 does weird things with align64.
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Samuel Pitoiset [Tue, 25 Jun 2019 06:21:37 +0000 (08:21 +0200)]
radv/gfx10: enable support for NAVI10, NAVI12 and NAVI14
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Bas Nieuwenhuizen [Sat, 6 Jul 2019 10:30:31 +0000 (12:30 +0200)]
radv/gfx10: Use GS rectlist when needed.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Samuel Pitoiset [Fri, 5 Jul 2019 06:33:06 +0000 (08:33 +0200)]
radv/gfx10: implement NGG support (VS only)
This needs to be cleaned up a bit, and it probably contains
missing stuff and/or bugs.
This doesn't fix the "half of the triangles" issue.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Bas Nieuwenhuizen [Sat, 6 Jul 2019 21:24:07 +0000 (23:24 +0200)]
radv: Combine vs and tes output keys parts.
That way the same deref is valid for both shader stages.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Bas Nieuwenhuizen [Sat, 6 Jul 2019 12:48:58 +0000 (14:48 +0200)]
radv/gfx10: Use new uconfig reg index packet for GFX10+.
Otherwise the hardware/firmware seems to not set the registers.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Bas Nieuwenhuizen [Sat, 6 Jul 2019 10:31:25 +0000 (12:31 +0200)]
radv/gfx10: Set MEM_ORDERED flags on shaders.
Scattered because depending on stage they are at offset 24/25/27/30.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Samuel Pitoiset [Wed, 26 Jun 2019 07:42:35 +0000 (09:42 +0200)]
radv/gfx10: emit GE_CNTL instead of IA_MULTI_VGT_PARAM for legacy mode
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Wed, 26 Jun 2019 07:09:33 +0000 (09:09 +0200)]
radv/gfx10: double the number of tessellation offchip buffers per SE
Each gfx10 shader engine corresponds to two gfx9 shader engines, so scale
the number of offchip buffers accordingly.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 06:21:15 +0000 (08:21 +0200)]
radv/gfx10: require LLVM 9+
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Fri, 5 Jul 2019 07:08:04 +0000 (09:08 +0200)]
radv/gfx10: disable geometry and tessellation shaders
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 09:50:13 +0000 (11:50 +0200)]
radv/gfx10: disable binning
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 09:48:27 +0000 (11:48 +0200)]
radv/gfx10: disable CLEAR_STATE
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 13:48:06 +0000 (15:48 +0200)]
radv/gfx10: disable VK_EXT_transform_feedback
It requires a bunch of work, so disable for now.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 15:45:25 +0000 (17:45 +0200)]
radv/gfx10: set user data base registers
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 15:19:11 +0000 (17:19 +0200)]
radv/gfx10: add gfx10_cs_emit_cache_flush
The cache flush logic on GFX10 is quite different and it's
implemented with a new function.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 14:18:40 +0000 (16:18 +0200)]
radv/gfx10: set the DCC constant encoding flag
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Fri, 5 Jul 2019 16:14:24 +0000 (18:14 +0200)]
radv/gfx10: do not declare streamout SGPRS
Streamout is completely different on GFX10.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 13:45:20 +0000 (15:45 +0200)]
radv/gfx10: do not set stream output shader config
Transform feedback is really different on GFX10.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 13:38:44 +0000 (15:38 +0200)]
radv/gfx10: emit VGT_VERTEX_REUSE_BLOCK_CNTL during gfx initialization
The value doesn't need to be updated for tess.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 12:48:08 +0000 (14:48 +0200)]
radv/gfx10: update shader-related fields in si_emit_graphics()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 12:42:06 +0000 (14:42 +0200)]
radv/gfx10: implement si_emit_compute()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 12:28:10 +0000 (14:28 +0200)]
radv/gfx10: mask DCC tile swizzle by alignment
DCC alignment can be less than the alignment of the main surface. In that
case, the DCC tile swizzle needs to be masked accordingly. Should have no
impact on pre-gfx10.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 12:13:36 +0000 (14:13 +0200)]
radv/gfx10: initialize GE_{MAX,MIN}_VTX_INDX/INDX_OFFSET
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Fri, 5 Jul 2019 14:09:03 +0000 (16:09 +0200)]
radv/gfx10: implement radv_flush_vertex_descriptors() change
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 12:10:42 +0000 (14:10 +0200)]
radv/gfx10: implement fill_geom_tess_rings()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 12:02:52 +0000 (14:02 +0200)]
radv/gfx10: implement radv_CmdBindDescriptorSets()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 12:00:04 +0000 (14:00 +0200)]
radv/gfx10: implement write_buffer_descriptor()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 11:56:22 +0000 (13:56 +0200)]
radv/gfx10: use the correct register for image descriptor dumping
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 11:17:51 +0000 (13:17 +0200)]
radv/gfx10: implement radv_pipeline_generate_hw_hs()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 11:33:03 +0000 (13:33 +0200)]
radv/gfx10: implement radv_fill_shader_variant()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 11:25:32 +0000 (13:25 +0200)]
radv/gfx10: implement radv_pipeline_generate_geometry_shader()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 10:32:01 +0000 (12:32 +0200)]
radv/gfx10: implement radv_init_sampler()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 10:16:39 +0000 (12:16 +0200)]
radv/gfx10: fix PS exports for SPI_SHADER_32_AR
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 10:11:42 +0000 (12:11 +0200)]
radv/gfx10: implement radv_get_device_name()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 10:09:41 +0000 (12:09 +0200)]
radv/gfx10: set RADV_FORCE_FAMILY
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 10:05:35 +0000 (12:05 +0200)]
radv/gfx10: fix a possible hang with exp pos0 with done=0 and exec=0
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 10:01:40 +0000 (12:01 +0200)]
radv/gfx10: set PA_SC_TILE_STEERING_OVERRIDE
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 09:59:53 +0000 (11:59 +0200)]
radv/gfx10: set cache control registers
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 09:24:48 +0000 (11:24 +0200)]
radv/gfx10: set llvm_has_working_vgpr_indexing
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 08:53:17 +0000 (10:53 +0200)]
radv/gfx10: update DB_DFSM_CONTROL register
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 08:51:48 +0000 (10:51 +0200)]
radv/gfx10: update DB_Z_INFO register
GFX10 uses the same register as GFX8.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 09:40:02 +0000 (11:40 +0200)]
radv/gfx10: implement radv_emit_global_shader_pointers()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 09:32:53 +0000 (11:32 +0200)]
radv/gfx10: implement radv_emit_tess_factor_ring()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 08:50:09 +0000 (10:50 +0200)]
radv/gfx10: implement radv_emit_fb_ds_state()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 08:42:49 +0000 (10:42 +0200)]
radv/gfx10: implement radv_initialise_ds_surface()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 08:30:29 +0000 (10:30 +0200)]
radv/gfx10: implement radv_emit_fb_color_state()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 08:20:33 +0000 (10:20 +0200)]
radv/gfx10: implement radv_initialise_color_surface()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 08:09:58 +0000 (10:09 +0200)]
radv/gfx10: implement radv_init_dcc_control_reg()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 07:37:58 +0000 (09:37 +0200)]
radv/gfx10: implement radv_make_buffer_descriptor()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 07:29:19 +0000 (09:29 +0200)]
radv/gfx10: implement si_set_mutable_tex_desc_fields()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 07:23:04 +0000 (09:23 +0200)]
radv/gfx10: add gfx10_make_texture_descriptor
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 16:15:14 +0000 (18:15 +0200)]
radv/gfx10: generate gfx10_format_table.h
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 06:47:47 +0000 (08:47 +0200)]
radv/gfx10: increase maximum number of layers to 8192
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 06:47:35 +0000 (08:47 +0200)]
radv/gfx10: increase maximum number of levels to 14
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 06:29:24 +0000 (08:29 +0200)]
radv/gfx10: set MAX_ALLOC_COUNT
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 25 Jun 2019 09:45:26 +0000 (11:45 +0200)]
ac/nir: unpacked GS invocation ID on GFX10+
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Thu, 4 Jul 2019 16:03:33 +0000 (18:03 +0200)]
ac: add missing formats to ac_get_tbuffer_format() for GFX10
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Lionel Landwerlin [Thu, 4 Jul 2019 18:55:49 +0000 (21:55 +0300)]
vulkan/overlay: fix command buffer stats
Begin/Reset of command buffer both reset the content of the command
buffer. Don't forget to wipe them on Begin.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 4438188f492e1f ("vulkan/overlay: record stats in command buffers and accumulate on exec/submit")
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Lionel Landwerlin [Sun, 7 Jul 2019 08:46:18 +0000 (11:46 +0300)]
anv: manually add KHR_display to the list of platforms
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 38305e6c94ea31 ("anv: replace hard-coded platform list with vk.xml parse")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111078
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Dave Airlie [Sun, 7 Jul 2019 06:21:45 +0000 (16:21 +1000)]
docs/features: add shader buffer and atomic support for llvmpipe
Dave Airlie [Wed, 26 Jun 2019 05:58:09 +0000 (15:58 +1000)]
llvmpipe: enable ARB_shader_storage_buffer_object
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Dave Airlie [Wed, 26 Jun 2019 05:57:30 +0000 (15:57 +1000)]
llvmpipe: add support for shader buffer binding.
This add support for setting shader buffers and passing them
to draw or binding them to the fragment shader jit.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Dave Airlie [Wed, 26 Jun 2019 05:56:32 +0000 (15:56 +1000)]
draw: add shader buffer interfaces.
This adds the interface to add mapped shader buffers,
and sets up the jit linkage for them.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Dave Airlie [Wed, 26 Jun 2019 05:53:53 +0000 (15:53 +1000)]
gallivm: add buffer operations to the tgsi->llvm conversion.
This adds load, store and atomic operations. These operations
have to respect the exec_mask, and can't operate in lanes where
the execute is off. This is needed to avoid side effects seen
outside the shaders.
There is also bounds checking on the ssbo accesses vs the size
ptr.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Dave Airlie [Wed, 26 Jun 2019 05:49:16 +0000 (15:49 +1000)]
gallivm: move mask_vec function up higher so it can be reused.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>