v3d: Fix wiring filters to NEAREST for 32-bit texture returns.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104626

v3d: Enable the driver by default.

Now that we have a stabilized ABI and a fairly conformant driver, turn it
on.

v3d: Rename driver functions from vc5 to v3d.

This is the final step of the driver rename.

v3d: Rename the driver files from "vc5" to "v3d".

v3d: Rename the vc5_dri.so driver to v3d_dri.so.

This allows the driver to load against the merged kernel DRM driver.  In
the process, rename most of the build system variables and gallium
plumbing functions.

v3d: Switch the vc5 driver to using the finalized V3D UABI.

In the process of merging to the kernel, I renamed the driver to the
general product line's name (since we have both vc5 and vc6 supported
already).  Since the ABI is finalized, move the header to include/drm-uapi.

svga: fix incompatible bind flags at buffer validation time

At buffer resource validation time, if the resource handle is not yet
created and if the initial buffer bind flags and the tobind flags are
incompatible, just use the tobind flags to create the resource handle.
On the other hand, if the bind flags are compatible, we can combine
the bind flags for the resource handle creation.

Fixes piglit gl-3.1-buffer-bindings crash.

Reviewed-by: Brian Paul <brianp@vmware.com>

mesa: cast the GLenum16 to GLint to avoid compile warning on android

Cast the enum to GLint to avoid the compile warning:
/src/mesa/main/get.c:3005:19:
warning: comparison of constant -32768 with expression of type
'GLenum16' (aka 'unsigned short') is always false
-Wtautologicalia-constant-out-of-range-compare

Tests: compilation without this warning
Signed-off-by: jenny.q.cao <jenny.q.cao@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

etnaviv: Fix missing rnndb file in tarballs

Seems that when the rnndb files for etniviv were updated/included back
in Nov 2017, hw/texdesc_3d.xml.h was missed from Makefile.sources and
meson.build. This was all during the conversion to meson, so it apears
to have slipped through the cracks. As such, this file has been missing
from the official tarballs since inclusion in Mesa, so the git trees
and tarballs differ.

Found due to lintian errors in the Debian packages.

Fixes: f1e1c60ff6 ("etnaviv: Update from rnndb")
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>

gallium/hud: add frametime graph (v2)

Thanks for your comment. This version has an additional boolean in the
fps_info struct to distinguish between fps and frame time calculation.
The struct is initialised in the respecting install functions for this
purpose.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>

eg/compute: Use reference counting to handle compute memory pool.

Use pipe_reference to release old RAT surfaces.
RAT surface adds a reference to pool bo, so use reference counting for pool->bo
as well.

v2: Use the same pattern for both defrag paths
    Drop confusing comment

CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>

gallivm: Use alloca_undef with array type instead of alloca_array

Use a single allocation of array type instead of the old-style array
allocation for the temp and immediate arrays.
Probably only makes a difference if they aren't used indirectly (so,
if we used them solely because there's too many temps or immediates).
In this case the sroa and early-cse passes can sometimes do some
optimizations which they otherwise cannot.
(As a side note, for the temp reg array, we actually really should
use one allocation per array id, not just one for everything.)
Note that the instcombine pass would actually promote such
allocations to single alloc of array type as well, but it's too late
for some artificial shaders we've seen to help (we don't want to run
instcombine at the beginning due to its cost, hence would need
another sroa/cse pass after instcombine). sroa/early-cse help there
because they can actually eliminate all of the huge shader, reducing
it to a single const output (don't ask...).
(Interestingly, instcombine also removes all the bitcasts we do on that
allocation for single-value gathering, and in the end directly indexes
into the single vector elements, which according to spec is only
semi-valid, but this happens regardless. Another thing instcombine also
does is use inbound GEPs, which is probably something we should do
manually as well - for indirectly indexed reg files llvm may not be
able to figure it out on its own, but we should be able to guarantee
all pointers are always inbound. In any case, by the looks of it
using single allocation with array type seems to be the right thing
to do even for ordinary shaders.)
No piglit change.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

radv: add generated files to .gitignore(s)

Signed-off-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

spirv: fix visiting inner loops with same break/continue block

We should stop walking through the CFG when the inner loop's
break block ends up as the same block as the outer loop's
continue block because we are already going to visit it.

This fixes the following assertion which ends up by crashing
in RADV or ANV:

SPIR-V parsing FAILED:
In file ../src/compiler/spirv/vtn_cfg.c:381
block->node.link.next == NULL
0 bytes into the SPIR-V binary

This also fixes a crash with a camera shader from SteamVR.

v2: make use of vtn_get_branch_type() and add an assertion

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106090
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106504
CC: 18.0 18.1 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

mesa/st: handle vert_attrib_mask in nir case too

Note, actually fixes 9987a072cb, but the problems don't show up until
19a91841c3.

Fixes: 19a91841c3 st/mesa: Use Array._DrawVAO in st_atom_array.c.
Fixes: 9987a072cb st/mesa: Make the input_to_index array available.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>

cso: check count == 0 in cso_set_vertex_buffers

The code didn't expect that, leading to crashes.

Fixes: 86d63b53a20a747e "gallium: remove aux_vertex_buffer_slot code"
Tested-by: Michel Dänzer <michel.daenzer@amd.com>

vc5: use util_copy_framebuffer_state

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

vc4: use util_copy_framebuffer_state

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

freedreno/a5xx: remove fd5_shader_stateobj

Extra level of indirection that serves no purpose.

Signed-off-by: Rob Clark <robdclark@gmail.com>

freedreno/a4xx: remove fd4_shader_stateobj

Extra level of indirection that serves no purpose.

Signed-off-by: Rob Clark <robdclark@gmail.com>

freedreno/a3xx: remove fd3_shader_stateobj

Extra level of indirection that serves no purpose.

Signed-off-by: Rob Clark <robdclark@gmail.com>

freedreno: fence should hold a ref to pipe

Since the fence can outlive the context, and all it really needs to wait
on a fence is the pipe, use the new fd_pipe reference counting to hold a
ref to the pipe and drop the ctx pointer.

This fixes a crash seen with (for example) glmark2:

  #0  fd_pipe_wait_timeout (pipe=0xbf48678b3cd7b32b, timestamp=0, timeout=18446744073709551615) at freedreno_pipe.c:101
  #1  0x0000ffffbdf75914 in fd_fence_finish (pscreen=0x561110, ctx=0x0, fence=0xc55c10, timeout=18446744073709551615) at ../src/gallium/drivers/freedreno/freedreno_fence.c:96
  #2  0x0000ffffbde154e4 in dri_flush (cPriv=0xb1ff80, dPriv=0x556660, flags=3, reason=__DRI2_THROTTLE_SWAPBUFFER) at ../src/gallium/state_trackers/dri/dri_drawable.c:569
  #3  0x0000ffffbecd8b44 in loader_dri3_flush (draw=0x558a28, flags=3, throttle_reason=__DRI2_THROTTLE_SWAPBUFFER) at ../src/loader/loader_dri3_helper.c:656
  #4  0x0000ffffbecbc36c in glx_dri3_flush_drawable (draw=0x558a28, flags=3) at ../src/glx/dri3_glx.c:132
  #5  0x0000ffffbecd91e8 in loader_dri3_swap_buffers_msc (draw=0x558a28, target_msc=0, divisor=0, remainder=0, flush_flags=3, force_copy=false) at ../src/loader/loader_dri3_helper.c:827
  #6  0x0000ffffbecbcfc4 in dri3_swap_buffers (pdraw=0x5589f0, target_msc=0, divisor=0, remainder=0, flush=1) at ../src/glx/dri3_glx.c:587
  #7  0x0000ffffbec98218 in glXSwapBuffers (dpy=0x502bb0, drawable=2097154) at ../src/glx/glxcmds.c:840
  #8  0x000000000040994c in CanvasGeneric::update (this=0xfffffffff400) at ../src/canvas-generic.cpp:114
  #9  0x0000000000411594 in MainLoop::step (this=this@entry=0x5728f0) at ../src/main-loop.cpp:108
  #10 0x0000000000409498 in do_benchmark (canvas=...) at ../src/main.cpp:117
  #11 0x00000000004071b0 in main (argc=<optimized out>, argv=<optimized out>) at ../src/main.cpp:210

Signed-off-by: Rob Clark <robdclark@gmail.com>

freedreno: batch cache doesn't hold a ref to batch

The cache doesn't hold a (strong) reference to the batch.  So we
shouldn't be trying to drop a reference, as that leads to:

   #0  0x0000ffffbecb37a0 in raise () from /lib64/libc.so.6
   #1  0x0000ffffbeca159c in abort () from /lib64/libc.so.6
   #2  0x0000ffffbecacf48 in __assert_fail_base () from /lib64/libc.so.6
   #3  0x0000ffffbecacfa8 in __assert_fail () from /lib64/libc.so.6
   #4  0x0000ffffbd28def0 in pipe_reference_described (ptr=0x4f47130, reference=0x0, get_desc=0xffffbd2e0f08 <__fd_batch_describe>) at ../src/gallium/auxiliary/util/u_inlines.h:88
   #5  0x0000ffffbd28e188 in fd_batch_reference_locked (ptr=0x4f40de0, batch=0x0) at ../src/gallium/drivers/freedreno/freedreno_batch.h:258
   #6  0x0000ffffbd28e9a8 in fd_bc_invalidate_resource (rsc=0x4f40ca0, destroy=true) at ../src/gallium/drivers/freedreno/freedreno_batch_cache.c:244
   #7  0x0000ffffbd293778 in fd_resource_destroy (pscreen=0xedc170, prsc=0x4f40ca0) at ../src/gallium/drivers/freedreno/freedreno_resource.c:644
   #8  0x0000ffffbd922674 in u_transfer_helper_resource_destroy (pscreen=0xedc170, prsc=0x4f40ca0) at ../src/gallium/auxiliary/util/u_transfer_helper.c:144
   #9  0x0000ffffbd29527c in pipe_resource_reference (ptr=0x4f455d8, tex=0x0) at ../src/gallium/auxiliary/util/u_inlines.h:144
   #10 0x0000ffffbd29548c in fd_surface_destroy (pctx=0x1012720, psurf=0x4f455d0) at ../src/gallium/drivers/freedreno/freedreno_surface.c:78
   #11 0x0000ffffbd1f9c48 in pipe_surface_reference (ptr=0x4f471d0, surf=0x0) at ../src/gallium/auxiliary/util/u_inlines.h:113
   #12 0x0000ffffbd1f9ef4 in util_copy_framebuffer_state (dst=0x4f471c8, src=0x0) at ../src/gallium/auxiliary/util/u_framebuffer.c:114
   #13 0x0000ffffbd2e0e30 in __fd_batch_destroy (batch=0x4f47130) at ../src/gallium/drivers/freedreno/freedreno_batch.c:225
   #14 0x0000ffffbd28e1b0 in fd_batch_reference_locked (ptr=0xfffffffff010, batch=0x0) at ../src/gallium/drivers/freedreno/freedreno_batch.h:262
   #15 0x0000ffffbd28e6b0 in fd_bc_invalidate_context (ctx=0x1012720) at ../src/gallium/drivers/freedreno/freedreno_batch_cache.c:190
   #16 0x0000ffffbd2e2b6c in fd_context_destroy (pctx=0x1012720) at ../src/gallium/drivers/freedreno/freedreno_context.c:139
   #17 0x0000ffffbd2c3280 in fd5_context_destroy (pctx=0x1012720) at ../src/gallium/drivers/freedreno/a5xx/fd5_context.c:56
   #18 0x0000ffffbd5b7a8c in st_destroy_context_priv (st=0xfd72f0, destroy_pipe=true) at ../src/mesa/state_tracker/st_context.c:281

Signed-off-by: Rob Clark <robdclark@gmail.com>

docs/meson: mark code/commands as <code>

Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>

docs/meson: replace plaintext url with a link

Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>

docs/meson: fix various html issues

Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>

docs/meson: fix various typos

Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>

meson: fix copyright symbol

Fixes: bd68f1013cea8742390c "autotools, meson: add tileset.h"
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>

autotools, meson: add tileset.h

Fixes: 4e52cb51b5 ("swr/rast: Thread locked tiles improvement")
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>

st/xa: Bump minor

Bump xa minor to signal that the underlying mesa version is suitable for dri3.

This is a bit ugly since it doesn't relate to a specific xa interface change.
Recently there has been a number of fixes in mesa that helps enabling dri3
without any significant regressions in automated testing and common desktop
usage latency. However, the xf86-video-vmware driver has no other way to tell
but inspecting the xa version.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

virgl: enable vertex streams when glsl level is high enough.

This enabled the vertex streams out when the host supports
GL4.0.

opencl: autotools: Fix linking order for OpenCL target

Otherwise the build fails with an undefined reference to
clang::FrontendTimesIsEnabled.

Bugzilla: https://bugs.freedesktop.org/106209
Cc: Jan Vesely <jan.vesely@rutgers.edu>
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Acked-by: Jan Vesely <jan.vesely@rutgers.edu>
Tested-by: Aaron Watry <awatry@gmail.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>

radv: reduce the number of parameters export by the GS copy shader

By using the geometry shader output usage mask.

This improves all Vulkan demos that use a geometry shader
(ie. geometryshader, deferredshadows, viewportarray).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: scan the geometry shader output usage mask

For reducing the number of parameters that are exported by
the GS copy shader.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: run the shader info pass before emitting the GS copy shader

For further optimizations.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: check that layout isn't NULL in radv_nir_shader_info_pass()

An upcoming patch will run the shader info pass on the
geometry shader just before emitting the GS copy shader.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

intel/blorp: Use linear formats for CCS_E clear colors in copies

It's clear that the original code meant to do this and there is even a
10-line comment explaining why.  Originally, we had a simple function
for packing the clear colors which was unaware of sRGB.  However, in
a6b66a7b26ae1, when we started using ISL to do the packing, the wrong
format was used.

Fixes: a6b66a7b26 "intel/blorp: Use ISL instead of bitcast_color..."
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

radv: Disable texel buffers with A2 SNORM/SSCALED/SINT for pre-vega.

The hardware always interprets the alpha as unsigned and fixing it
in the shader is going to add unacceptable overheads.

CC: 18.0 18.1 <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106480
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

radv: Fix up 2_10_10_10 alpha sign.

Pre-Vega HW always interprets the alpha for this format as unsigned,
so we have to implement a fixup to do the sign correctly for signed
formats.

v2: Improve indexing mess.

CC: 18.0 18.1 <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106480
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

radv: Add support for IMG_DATA_FORMAT_32_32_32.

Basic sampling support for linear tiling.

No CTS regressions, but it seems the blitting coverage is not very
extensive.

https://bugs.freedesktop.org/show_bug.cgi?id=106331
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

radv: Translate logic ops.

radeonsi could pass them through but the enum changed between
Gallium and Vulkan, so we have to translate.

In progress I made the register defines a bit more readable.

CC: 18.0 18.1 <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100430
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

radv: Fix multiview queries.

This moves the extra queries to after the main query ended, instead
of doing it after the begin and hence doing nesting.

We also emit only (view count - 1) extra queries, as the main query
is already there for the first view.

This fixes the CTS occasionally getting stuck in
dEQP-VK.multiview.queries* waiting on results.

Fixes: 32b4f3c38dc "radv/query: handle multiview queries properly. (v3)"
CC: 18.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

meson: remove dependency antipattern

`dep_valgrind != []` now (0.45) produces a warning that is quite explicit:
  WARNING: Trying to compare values of different types (DependencyHolder, list) using !=.
  The result of this is undefined and will become a hard error in a future Meson release.

`dep_valgrind = []` used to be the recommended way to deal with
non-existant dependency, but these don't work with `.found()`, so now
the recommended way is to declare a impossible dependency, which
null_dep does for us in Mesa.

In short, we don't need and shouldn't check for `!= []` anywhere anymore.

Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>

radv: remove useless check in radv_create_shaders()

radv_can_dump_shader() already handles if module is NULL.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

radv: allow to dump the GS copy shader with RADV_DEBUG="shaders"

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

radv: move {load,store}_var intrinsics scanning in different functions

These are going to be crazy and we are probably going to add
more scan stuff in the future. Also use switch cases instead.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

android: change include "cutils/log.h" to "log/log.h" on Android API >=26

There is a compile warning from Android 8 (API version 26) from "include cutils/log.h"
warning: "Deprecated: don't include cutils/log.h, use either android/log.h or log/log.h"-W#warnings,
Change to include "log/log.h" on Android 8 or later major version to avoid this warning

Signed-off-by: jenny.q.cao <jenny.q.cao@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>

llvmpipe: Fix random number generation for unit tests

We were never producing negative numbers for signed types.
Also fix only producing half the valid range for uint32, and
properly clamp signed values.

Because this now also properly tests snorm with actually negative
values, need to increase eps for such conversions. I believe these
cannot actually be hit in ordinary operation (e.g. if a snorm texture
is sampled and output to snorm RT, it will still go through snorm->float
and float->snorm conversion), so don't bother to do anything to fix
the bad accuracy (might be quite complex).
Basically, the issue is for something like snorm16->snorm8 that in the
end this will just use a 8 bit arithmetic right shift.
But the math behind it says we should actually do a division by 32767 / 127, which
is ~258, not 256. So the result can be one bit off (values have too large
magnitude), and furthermore, the shift has incorrect rounding (always rounds
down). For positive numbers, these errors have different direction, but
for negative ones they have the same, hence for some values the error will
be 2 bit in the end.

Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=106232

radv: use compute path for multi-layer images.

I don't think the hw resolve path can't handle multi-layer images.

This fixes all the:
dEQP-VK.renderpass.multisample_resolve.layers_*
tests on my VI card.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: <mesa-stable@lists.freedesktop.org>

radv: resolve all layers in compute resolve path.

This path should iterate across all layers, I've some ideas
for doing this in a single pass, but this is simpler for now.

This passes the tests because we don't use the fragment path
unless we have DCC, and we don't have DCC on layered images.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: <mesa-stable@lists.freedesktop.org>

radv/resolve: do fmask decompress on all layers.

For a multi-layer subpass resolve we want to make sure we flush all
the layers.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: <mesa-stable@lists.freedesktop.org>

nvc0: fix setting of subpixel precision during conservative rasterization

Fixes: 07dac3e040 ("nvc0: add conservative rasterization support")
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

anv,nir: add generated files to .gitignore(s)

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

gallium: remove aux_vertex_buffer_slot code

The slot index is always 0, and is pretty unlikely to change in the future.

Reviewed-by: Brian Paul <brianp@vmware.com>

radv: add initial support for VK_PIPELINE_CREATE_DISABLE_OPTIMIZATION_BIT

When VK_PIPELINE_CREATE_DISABLE_OPTIMIZATION_BIT is set we skip NIR
linking optimisations and only run over the NIR optimisation loop
once similar to the GLSLOptimizeConservatively constant used by
some GL drivers.

We need to run over the opts at least once to avoid errors in LLVM
(e.g. dead vars it can't handle) and also to reduce the time spent
compiling the IR in LLVM.

With this change the Blacksmith Unity demos compilation times
go from 329760 ms -> 299881 ms when using Wine and DXVK.

V2: add bit to radv_pipeline_key

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106246

scons: Add PROGRAM_NIR_FILES.

Fix SCons build error.

  Linking build/linux-x86_64-debug/gallium/targets/libgl-xlib/libGL.so.1.5 ...
build/linux-x86_64-debug/mesa/libmesa.a(st_program.os): In function `st_translate_prog_to_nir':
src/mesa/state_tracker/st_program.c:392: undefined reference to `prog_to_nir'

Fixes: 5c33e8c7729e ("st/nir: use NIR for asm programs")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>

st/nir: use NIR for asm programs

Reviewed-by: Eric Anholt <eric@anholt.net>

st/nir: make st_nir_opts() available externally

The following patch will make use of this for asm style programs.

Reviewed-by: Eric Anholt <eric@anholt.net>

radeon/vce: add firmware support for ver 53 and up

All vce firmwares with major version greater than or equal to 53 are supported

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>

etnaviv: remove pipe_fence_handle::ctx

A fence can outlive the ctx it was created from (see glmark2).. etnaviv
doesn't actually need fence->ctx so lets remove it before someone makes
the mistake of assuming it is a valid pointer.

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>

swr/rast: Thread locked tiles improvement

- Change tilemgr TILE_ID encoding to use Morton-order (Z-order).
- Change locked tiles set to bitset.  Makes clear, set, get much faster.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: Add Builder::GetVectorType()

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: Prepend the console output with a newline

It can get jumbled with output from other threads.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: Add ConcatLists()

for concatenating lists

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: Add constant initializer for uint64_t

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: Use binner topology to assemble backend attributes

Previously was using the draw topology, which may change if GS or Tess
are active. Only affected attributes marked with constant interpolation,
which limited the impact.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: Change formatting

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

meson: Fix build for egl platform_x11 with dri3

platform_x11 with dri3 needs inc_loader.

In file included from ../src/egl/drivers/dri2/platform_x11_dri3.c:35:0:
../src/egl/drivers/dri2/egl_dri2.h:41:32: fatal error: loader_dri3_helper.h: No such file or directory
In file included from ../src/egl/drivers/dri2/platform_x11.c:46:0:
../src/egl/drivers/dri2/egl_dri2.h:41:32: fatal error: loader_dri3_helper.h: No such file or directory
In file included from ../src/egl/drivers/dri2/egl_dri2.c:61:0:
../src/egl/drivers/dri2/egl_dri2.h:41:32: fatal error: loader_dri3_helper.h: No such file or directory

Cc: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

radv: move ac_build_if_state on top of radv_nir_to_llvm.c

These helpers will be needed for future work.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

radv: minor cleanups in radv_fill_shader_variant()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

winsys/amdgpu: Destroy dev_hash table when the last winsys is removed.

Fixes memory leak on module unload.

CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

ac/gpu_info: add has_read_registers_query

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

ac/gpu_info: add has_2d_tiling

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

ac/gpu_info: add has_sparse_vm_mappings

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

ac/gpu_info: add has_unaligned_shader_loads

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: expose ARB_query_buffer_object on ancient kernels too

It doesn't use indirect dispatches.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

ac/gpu_info: add has_indirect_compute_dispatch

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

ac/gpu_info: add kernel_flushes_tc_l2_after_ib

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

ac/gpu_info: add has_format_bc1_through_bc7

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

ac/gpu_info: add has_eqaa_surface_allocator

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: clean up the reset status query implementation

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

ac/gpu_info: add has_bo_metadata

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

ac/gpu_info: add si_TA_CS_BC_BASE_ADDR_allowed

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

ac/gpu_info: add htile_cmask_support_1d_tiling

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

ac/gpu_info: add kernel_flushes_hdp_before_ib

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: add an environment variable that forces EQAA for MSAA allocations

This is for testing and experiments.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: set up EQAA image descriptors properly

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: add EQAA SC,DB,CB register programming

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: support creating EQAA color textures

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

ac/surface: add EQAA support

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: use better sample locations for 8x EQAA

Verified with the piglit MSAA accuracy test.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: improve quality of 16 sample locations

This results in better 16x and 8x quality when using these locations.
Verified with the piglit MSAA accuracy test.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: use better sample locations for 4x MSAA

Discovered by luck. Verified with the piglit MSAA accuracy test.
It also shows that the worst case EQAA 16s4f results in very good 4x MSAA
in the worst case.

Nine might not like these positions, but they are prettier to the eye and
GL doesn't care.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: reorder sample locations as required by EQAA

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: simplify si_get_sample_position

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: simplify arrays of sample locations

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: set DB_EQAA the same as Vulkan

These never change, but they only affect EQAA, which isn't implemented.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: remove CM_ prefixes

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: don't update clear color registers if they don't change

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: remove r600_fmask_info

radeon_surf contains almost everything.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>