glsl: Initialize samplers to 0, propagate sampler values to the gl_program

The spec requires that samplers be initialized to 0.  Since this
differs from the 1-to-1 mapping of samplers to texture units assumed
by ARB assembly shaders (and the gl_program structure), be sure to
propagate this date from the gl_shader_program to the gl_program.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
CC: Vadim Girlin <vadimgirlin@gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=49088

glsl: Set initial values for uniforms in the linker

v2: Fix handling of arrays-of-structure.  Thanks to Eric Anholt for
pointing this out.

v3: Minor comment change based on feedback from Ken.

Fixes piglit glsl-1.20/execution/uniform-initializer/fs-structure-array
and glsl-1.20/execution/uniform-initializer/vs-structure-array.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/gen6+: Add support for GL_ARB_blend_func_extended.

v2: Add support for gen6, and don't turn it on if blending is
    disabled. (fixes GPU hang), and note it in docs/GL3.txt

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

mesa: Keep a computed value for dual source blend func with each buffer.

The i965 driver needed this as well for hardware setup, so instead of
duplicating the logic, just save it off.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>

i965/gen6+: Add support for fast depth clears.

Improves citybench high-res performance 3.0% +- 0.4%, n=10.  Improves
Lightsmark 1024x768 performance 0.74% +/- 0.20% (n=78).  No
significant difference on openarena (n=5, didn't fast clear) or nexuiz
(n=3).

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>

i965/gen6: Add CC viewport state setup to blorp code.

While it doesn't have the same warning in the simulator as in gen7,
let's emit it out of paranoia.  We wouldn't want our resolves of some
previous clear to get clamped to some current clamping value.

Suggested-by: pretty much everyone

i965/gen7: Add CC viewport setup to blorp code.

When doing fast clears, a fulsim warning said that the batch was being
emitted without the viewport set up.  While the fast clear pass I was
looking at doesn't use the clear value, the later resolves which also
didn't set up the vieport would trigger the same.  It's not obvious
from the error message whether it meant "fast clear value gets clamped
to something you haven't defined" or "fast clear value doesn't get
clamped, and I saw it was out of the current (uninitialized) range,
and you probably wanted it clamped to that (uninitialized) range".  Be
paranoid and assume the first case.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>

i965: Drop a layer of indirection in doing HiZ resolves.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>

i965: Replace intel_need_resolve with the hiz ops it maps to.

Having this enum separate caused us to need a bunch of helper
functions to translate to the op to be executed.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>

i965: Add an interface for doing hiz ops from C code.

This required moving gen6_hiz_op, and I put it in intel_resolve_map.h
for the next commit.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>

i965: Rename the clear function for this driver.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>

i965: Simplify the remaining clear logic by relying on the meta clear.

The GLSL clear path doesn't need any buffer presence checks, since
those are already handled in the normal drawing path code.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>

i965: Switch blit color clears to tri clears on gen4/5.

Our understanding is that the 3D engine is supposed to be faster
anyway.  We used to have more overhead in our tri clear path than we
do today, which would have led to this choice.  But given that we
almost always see a depth clear along with a color clear, the path was
hardly exercised anyway.

Also, the color mask logic was broken in the presence of
GL_EXT_draw_buffers2's per-buffer colormask.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>

i965: Remove dead logic for non-tri depth/stencil clears.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>

i965: We always have GLSL, so always use it for tri clears.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>

i915: Drop gen4+ code from the forked clear code.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>

intel: Fork the intel_clear.c file between i915 and i965.

This logic is wasted on i965 when we want to just always do GLSL tri
clears.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>

st/mesa: set stObj->lastLevel in guess_and_alloc_texture

Fixes lockups/asserts with depthstencil-render-miplevels tests and r600g.
Should also fix https://bugs.freedesktop.org/show_bug.cgi?id=50033

NOTE: This is a candidate for the 8.0 branch.

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

i965: Completely annotate the batch bo when aub dumping.

Previously, when the environment variable INTEL_DEBUG=aub was set,
mesa would simply instruct DRM to start dumping data to an .aub file,
but we would not provide DRM with any information about the format of
the data in various buffers.  As a result, a lot of the data in the
generate .aub file would be unannotated, making further data analysis
difficult.

This patch causes the entire contents of each batch buffer to be
annotated using the data in brw->state_batch_list (which was
previously used only to annotate the output of INTEL_DEBUG=bat).  This
includes data that was allocated by brw_state_batch, such as binding
tables, surface and sampler states, depth/stencil state, and so on.

The new annotation mechanism requires DRM version 2.4.34.

Reviewed-by: Eric Anholt <eric@anholt.net>

intel: When AUB dumping, flush before emitting final bitmap command.

When we are generating an AUB dump, we make a final call to
aub_dump_bmp() as the context is being destroyed, to ensure that any
rendering performed before the application exits can be seen during a
simulation run.  However, we were doing this before flushing the batch
buffer; as a result simulation runs would not always see the effect of
all rendering commands.

This patch flushes the batch buffer just before making the final call
to aub_dump_bmp(), to ensure that all rendering is properly captured
in the final bitmap.

llvmpipe: Fix alpha testing precision on rgba8 formats.

This is a long standing problem, that recently surfaced with the change
to enable perspective correct color interpolation.

A fix for all possible formats is left to the future.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>

scons: Do not build glx and egl on Cygwin.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: José Fonseca <jfonseca@vmware.com>

nv30: check for NULL vertex buffers in prevalidate_vbufs

nv50: make unaligned index buffer offsets work again

Messed up in ef7bb281292c17b762b57779306e874704c87328.

nvc0: don't set NEW_IDXBUF in nvc0_switch_pipe_context if none is bound

llvmpipe: Added a error counter to lp_test_conv.

Useful for keeping track of progress when fixing errors!

Signed-off-by: José Fonseca <jfonseca@vmware.com>

llvmpipe: Changed known failures in lp_test_conv.

To comply with the recent fixes to lp_bld_conv.

Signed-off-by: José Fonseca <jfonseca@vmware.com>

llvmpipe: Added fixed point types tests to lp_test_conv.

Signed-off-by: José Fonseca <jfonseca@vmware.com>

gallivm: Fixed erroneous optimisation in lp_build_min/max.

Previously assumed normalised was 0 to 1, but it can be -1 to 1
if type is signed.
Tested with lp_test_conv and lp_test_format, reduced errors.

Signed-off-by: José Fonseca <jfonseca@vmware.com>

gallivm: Compensate for lp_const_offset in lp_build_conv.

Fixing a /*FIXME*/ to remove errors in integer conversion in lp_build_conv.
Tested using lp_test_conv and lp_test_format, reduced errors.

Signed-off-by: José Fonseca <jfonseca@vmware.com>

gallivm: Fixed overflow in lp_build_clamped_float_to_unsigned_norm.

Tested with lp_test_conv and lp_test_format, reduced errors.

Signed-off-by: José Fonseca <jfonseca@vmware.com>

docs: add link to 8.0.3 release notes

tests: include mesa headers

else they will fail for fresh installs

Signed-off-by: Brian Paul <brianp@vmware.com>

glu: fix two Clang warnings

This patch removes two Clang warnings in GLU:

The first one seems to be an actual bug in mapdesc.cc: Clang complains
that sizeof(dest) will return the size of REAL*[MAXCOORDS], instead of
the intended REAL[MAXCOORDS][MAXCOORDS]. The second one is just
cosmetic because Clang doesn't like extra parentheses.

NOTE: This is a candidate for the 8.0 branch

Reviewed-by: Brian Paul <brianp@vmware.com>

docs: fix a typo

Signed-off-by: Brian Paul <brianp@vmware.com>

Filter out -Wcovered-switch-default from LLVM_CFLAGS

Signed-off-by: José Fonseca <jfonseca@vmware.com>

radeon/llvm: Handle selectcc DAG node

R600 can now select instructions from the selectcc DAG node, which is
typically lowered to one of the SET* instructions.

st/mesa: use pipe_sampler_view_release() in st_destroy_context_priv()

Fixes another case of sampler views being created by one context,
shared by another, then deleted by the first, leaving a dangling
pipe context pointer.

Reviewed-by: José Fonseca <jfonseca@vmware.com>

mesa: use F_TO_I() instead of IROUND()

Use it where performance matters more and the exact method of float->int
conversion/rounding isn't terribly important.  There should no net change
here since F_TO_I() is the new name of the old IROUND() function.

Reviewed-by: José Fonseca <jfonseca@vmware.com>

mesa: reimplement IROUND(), add F_TO_I()

The different implementations of IROUND() behaved differently and in
the case of fistp, depended on the current x86 FPU rounding mode.
This caused some tests like piglit roundmode-pixelstore and
roundmode-getintegerv to fail on 32-bit x86 but pass on 64-bit x86.

Now IROUND() always rounds to the nearest integer (away from zero).
The new F_TO_I function converts a float to an int by whatever means
is fastest.  We'll use this where we're more concerned with performance
and not too worried to how the conversion is done.

Reviewed-by: José Fonseca <jfonseca@vmware.com>

mesa: fix Z32_FLOAT -> uint conversion functions

The IROUND converted all arguments to 0 or 1.  That's not what we wanted.

NOTE: This is a candidate for the 8.0 branch.

Reviewed-by: José Fonseca <jfonseca@vmware.com>

st/mesa: remove unused pipe variable

svga: whitespace, comments, formatting clean-ups

st/mesa: added st_print_current_vertex_program(), for debugging

svga: return PIPE_OK instead of 0

And fix the emit_rss() function's return type.

svga: fix zero-stride vertex array bug

For zero-stride vertex arrays, the svga driver copies the value into
the constant value and uses that value in the shader.  The recent
gallium-userbuf changes caused a regression in this.  An example
symptom was per-primitive glColor3f() calls getting ignored.

Where we copied the vertex value from the vertex buffer to the
constant buffer we neglected to take into account the
pipe_vertex_buffer::buffer_offset field.  Adding that value to the
source offset fixes the problem.  Actually, it looks like we should
have been doing this all along, but it never was an issue before for
some reason.

mesa: add GLSL_REPORT_ERRORS debug flag

If the MESA_GLSL env var contains "errors", GLSL compilation and
link errors will be reported to stderr.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

mesa: add some comments on shaderapi.c functions

mesa: Remove undefinition of _P symbol.

IRIX isn't used anymore.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>

Import release notes for 8.0.3, add news item

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>

darwin: Address a build failure on Leopard and earlier OS versions

<https://trac.macports.org/ticket/34499>

Regression-from: 51691f0767f6a75a1f549cd979a878a0ad12a228
Signed-off-by: Jeremy Huddleston <jeremyhu@apple.com>

radeonsi: Only honour point related rasterizer state when rendering points.

Avoids hangs when not rendering points.

radeonsi: Fix parameter cache offsets for fragment shader inputs.

gallium/tgsi/text: Ensure ret is initialized in parse_immediate_data.

Fix uninitialized scalar variable defect reported by Coverity.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>

radeon/llvm: Fix segfault while lowering lrp intrinsic

radeon/llvm: Add DAG nodes for MIN instructions

Also, remove the AMDIL MIN* instruction defs.

llvmpipe: Avoid adding floating point zero to flat inputs.

Which could clobber integer inputs, if the addition is not optimized away
(e.g., if optimizations are disabled for debugging purposes).

Fix fetching integer inputs.

llvmpipe: Implement TXQ.

Piglits test for fragment shaders pass, vertex shaders fail.  The
actual failure seems to be in the interpolators, and not the
textureSize query.

Signed-off-by: Olivier Galibert <galibert@pobox.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: José Fonseca <jose.r.fonseca@gmail.com>

llvmpipe: Don't mess with the provoking vertex when inverting a triangle.

Fixes a bunch of piglit tests related to flat interpolation of floats.

Signed-off-by: Olivier Galibert <galibert@pobox.com>
Signed-off-by: José Fonseca <jose.r.fonseca@gmail.com>

radeon/llvm: Lower lrp intrinsic during ISel

radeon/llvm: Remove AMDIL MAD instruction defs

radeon/llvm: Remove AMDIL MUL_IEEE* instructions

r600g: Handle MUL_IEEE in r600_bytecode_get_num_operands

radeon/llvm: Expand fsub during ISel

radeon/llvm: Remove AMDIL floating-point ADD instruction defs

radeon/llvm: Remove AMDIL CMOVLOG* instruction defs

radeon/llvm: Move lowering of ABS_i32 to ISel

radeon/llvm: Remove sub patterns from AMDILInstrPatterns.td

radeon/llvm: Add custom SDNodes for MAX

We now lower the various intrinsics for max to SDNodes and then use
tablegen patterns to lower the SDNodes to instructions.

state_tracker: remove sw_primitive_restart from st_context

The VBO module now can handle primitive restart in software
if required.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

state_tracker: remove software handling of primitive restart

The VBO module now can handle primitive restart in software
if required. Therefore this support is no londer required.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

state_tracker: set PrimitiveRestartInSoftware if needed

If the PIPE_CAP_PRIMITIVE_RESTART screen param is not set, then enable
PrimitiveRestartInSoftware to enable software primitive restart
support in the VBO module.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

vbo: use software primitive restart in the VBO module

When PrimitiveRestartInSoftware is set, the VBO module will handle
primitive restart scenarios before calling the vbo->draw_prims
drawing function.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

mesa: add PrimitiveRestartInSoftware to gl_context.Const

If set, then the VBO module will handle all primitive
restart scenarios before calling the driver draw_prims.

Software primitive restart support is disabled by default.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

vbo: add software primitive restart support

vbo_sw_primitive_restart implements primitive restart in software
by splitting primitive draws apart.

This is based on similar support in mesa/state_tracker/st_draw.c.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

mesa: Check for framebuffer completeness before looking at the rb.

Otherwise, an incomplete framebuffer could have a NULL
_ColorReadBuffer and we'd deref that.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

mesa: Fix assertion failure when a cube face is not present.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

glsl: Drop the extra NULL specifiction on ir_assignment constructors.

It's an implied argument, and I don't think being explicit about it
helps.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

glsl: Fix assertion failure on handling switch on uint expressions.

Fixes piglit glsl-1.30/execution/switch/fs-uint.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

glsl: Reject non-scalar switch expressions.

The comment quotes spec saying that only scalar integers are allowed,
but we only checked for integer.

Fixes piglit switch-expression-const-ivec2.vert

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

glsl: Let the constructor figure out the types of switch-related expressions.

I noticed this while unindenting the code.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

glsl: Fix indentation of switch code.

I managed to completely trash it in 22d81f15.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

i965/vs: Fix up swizzle for dereference_array of matrices.

Fixes assertion failure in piglit:
vs-mat2-struct-assignment.shader_test
vs-mat2-array-assignment.shader_test

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

mesa: Throw error on glGetActiveUniform inside Begin/End.

Fixes piglit GL_ARB_shader_objeccts/getactiveuniform-beginend.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

glsl: Improve the local dead code optimization to eliminate unused channels.

Total instructions: 261582 -> 261316
135/2147 programs affected (6.3%)
36752 -> 36486 instructions in affected programs (0.7% reduction)

This excludes a tropics shader that now gets 16-wide mode and throws
off the numbers.  5 shaders are hurt: two extra MOVs in 4 tropics
shaders it looks like because we don't split register names according
to independent webs, and one gstreamer shader where it looks like
try_rewrite_rhs_to_dst() is falling on its face.

This should also help avoid a regression in VSes from idr's ARB
programs to GLSL work.

i965/fs: Do more register coalescing by using the interference graph.

By using the live variables code for determining interference, we can
handle coalescing in the presence of control flow, which the other
register coalescing path couldn't.

Total instructions: 207184 -> 206990
74/1246 programs affected (5.9%)
33993 -> 33799 instructions in affected programs (0.6% reduction)

There is a newerth shader that loses out, because of some extra MOVs
that now get their dead-code nature obscured by coalescing.  This
should be fixed by doing better at dead code elimination.

nouveau: place static buffers in VRAM if preferred by the driver

nv50/ir: fix reversed order of lane ops in quadops

nv50,nvc0: handle user vertex buffers

And restructure VBO validation a little in the process.

nv50,nvc0: handle user index buffers

nv50,nvc0: handle user constbufs without wrapping them in a resource

st/mesa: set PIPE_BIND_STREAM_OUTPUT for TFB target in st_bufferobj_data

darwin: Eliminate a possible race condition while destroying a surface

Introduced by: c60ffd2840036af1ea6f2b6c6e1e9014bb8e2c34
Signed-off-by: Jeremy Huddleston <jeremyhu@apple.com>

darwin: Unlock our mutex before destroying it

http://xquartz.macosforge.org/trac/ticket/575

Signed-off-by: Jeremy Huddleston <jeremyhu@apple.com>

gallium/radeon: Fix r300g tiling breakage.

Commit 11f056a3f0b87e86267efa8b5ac9d36a343c9dc1 broke the r300g build. Fix it
up, and reinstate some code which isn't needed by r600g and radeonsi but is
by r300g.

gallium/auxiliary/pipe-loader: Fix usage of anonymous union.

Anonymous unions aren't part of the C99 standard.  Fixes build on GCC
versions older than 4.6.

https://bugs.freedesktop.org/show_bug.cgi?id=50001

Reported-by: Michael Lange <michaell@gmx.org>

radeonsi: Initial tiling support.

Largely based on the corresponding Evergreen support in r600g.

r600g: Set tiling information for BOs being shared.

Fixes https://bugs.freedesktop.org/show_bug.cgi?id=48747

st/xorg: Better handling of EXA copies.

Always use the resource_copy_region hook. If a source and destination rectangle
overlap, copy to/from a temporary pixmap.