radv: Invert ring SGPR check.

I assume this wants to check if all pipelines use the same SGPR for
the rings.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Acked-by: Edward O'Callaghan <funfunctor@folklore1984.net>

radv: Clamp framebuffer dimensions to min. attachment dimensions.

Even though the preferred stance is not to fix incorrect applications
via the driver, this prevents some nasty GPU hangs.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>

gallium: remove TGSI_OPCODE_CLAMP

Not used and not widely supported. Use MIN+MAX instead.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

ac/llvm: use min+max instead of AMDGPU.clamp on LLVM 5.0

It selects v_med3_f32, which has the same rate & size.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: stop using TGSI_OPCODE_CLAMP by moving it amd/common

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

tgsi/lowering: stop using TGSI_OPCODE_CLAMP

v2: do it correctly

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

st/mesa: stop using TGSI_OPCODE_CLAMP

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: use R600_RESOURCE_FLAG_UNMAPPABLE where it's desirable

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: add R600_RESOURCE_FLAG_UNMAPPABLE

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: change r600_aligned_buffer_create to take flags, not bind

All call sites set bind = 0. The next commit will use this.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: upload constants into VRAM instead of GTT

This lowers lgkm wait cycles by 30% on VI and normal conditions.
The might be a measurable improvement when CE is disabled (radeon)
or under L2 thrashing.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: use TCC line size as alignment in other places

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: use a clever alignment for index buffer uploads

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: use a clever alignment for descriptor uploads

Non-VBO descriptors won't be smaller than the cache line, so simply use
the cache line size.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: use a clever alignment for constant buffer uploads

This results in a very tiny decrease in lgkm wait cycles.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: move index buffer flushing into a non-upload indexed case

The other codepaths don't need this.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: use SI_MAX_ATTRIBS where it should be used

for consistency; no change in behavior

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: sort members of si_shader_key::part

and improve some comments

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: have separate LS and ES main shader parts in the shader selector

This might reduce the on-demand compilation if the initial VS/LS/ES
determination is wrong.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: don't compile pure monolithic shaders asynchronously

there is no point, we have to wait anyway.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: allow unaligned vertex buffer offsets and strides on CIK-VI

So that we can disable u_vbuf for GL core profiles.

This is a v2 of the previous VI-only patch.
It requires SH_MEM_CONFIG.ALIGNMENT_MODE = UNALIGNED on CIK-VI.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: remove the fix_size3 workaround

not needed with the shader fallback

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: add a workaround for clamping unaligned RGB 8 & 16-bit vertex loads

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: make fix_fetch an array of uint8_t

so that we can add 3-component fallbacks.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

vl: fix a buffer leak in the bicubic filter by using an uploader

there's no error checking, because the previous code didn't do it either.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/hud: create files after graphs are created to get final names

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>

gallium/u_suballoc: allow setting pipe_resource::flags

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/u_suballoc: use clear_buffer if available

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/util: correctly unref a buffer in u_prim_restart

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/util: remove unused u_index_modify helpers

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/util: remove unused helper util_draw_texquad

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/docs: remove documentation of non-existent instructions

trivial

anv/TODO: Check off Storage Image Without Format

The code for this landed a few days ago.

ac/llvm: fix various findMSB bugs

sffbh needs to be suffixed with ".i32"

Reviewed-by: Dave Airlie <airlied@redhat.com>

glsl: link error if unsized array not-last in ssbo

If an unsized declared array is not the last in an SSBO
and an implicit size can not be defined on linking time,
the linker should raise an error instead of reaching
an assertion on GL.

This reverts part of commit 3da08e166415a745139c1127040a24e8a45dc553
getting back to the behavior of commit 5b2675093e863a52b610f112884ae12d42513770

The original patch was correct for GLES that should produce
a compile-time error but the linker error is still necessary
in desktop GL.

Fixes the following piglit tests:
tests/spec/arb_shader_storage_buffer_object/non_integral_size_array_member.shader_test
tests/spec/arb_shader_storage_buffer_object/unsized_array_member.shader_test

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>

i965/fs: fix uninitialized memory access

Found while running shader-db under valgrind.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>

glsl: disable on disk shader cache when running as another user

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

mesa/formatquery: use consistent local function names

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>

radv: Use different allocator for descriptor set vram.

This one only keeps allocated memory in the list, and list nodes
in the descriptor sets. Thsi doesn't need messing around with
max_sets, and we get automatic merging of free regions.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>

radv: Never try to create more than max_sets descriptor sets.

We only use the freed ones after all free space has been used. If
the app only allocates small descriptor sets, we might go over
max_sets before the memory is full.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
CC: <mesa-stable@lists.freedesktop.org>
Fixes: f4e499ec79147f4172f3669ae9dafd941aaeeb65

i965/fs: fix 32-bit data type to int64 conversion on BSW/BXT

The 32-bit to 64-bit conversions need to have the 32-bit
data source elements aligned to 64-bit but only with doubles as
destination type.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99660
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Tested-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

glsl: fix scons builds with shader cache

For now its disabled for scons so wrap glsl cache calls in a
define conditional.

util/disk_cache: fix typo in function stub

i965/fs: Remove hand-coded 64-bit packing optimizations

The optimization in unpack_64 is clearly subsumed with the opt_algebraic
optimizations in the previous commit.  The pack optimization may not be
quite handled by opt_algebraic but opt_algebraic should get the really
bad cases.  Also, it's been broken since it was merged and we've never
noticed so it must not be doing anything.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

nir/algebraic: Optimize 64bit pack/unpack

This reduces the instruction count in some fp64 and int64 piglit tests

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

nir: Rename lower_double_pack to lower_64bit_pack

There's nothing "double" about it other than, perhaps, the fact that it
packs two 32-bit values.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

nir: Combine the int and double [un]pack opcodes

NIR is a typeless IR and the two opcodes, when considered bitwise, do
exactly the same thing.  There's no reason to have two versions.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs: Fix the inline nir_op_pack_double optimization

We can only do the optimization if the source *is* SSA.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>

swr: remove unneeded extern "C"

the guards have been added to the header files that needed them.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

gallium: add extern "C" guards

Added extern "C" __cplusplus guards on headers that did not have them.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

util/disk_cache: check cache exists before calling munmap()

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

util/disk_cache: add support for removing old versions of the cache

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

util/disk_cache: allow drivers to pass a directory structure

In order to avoid costly fallback recompiles when cache items are
created with an old version of Mesa or for a different gpu on the
same system we want to create directories that look like this:

./{TIMESTAMP}_{LLVM_TIMESTAMP}/{GPU_ID}

Note: The disk cache util will take a single timestamp string, it is
up to the backend to concatenate the llvm string with the mesa string
if applicable.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

mesa: remove cache creation from _mesa_initialize_context()

We will change the way we create the cache directory in the following
patches.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

st/mesa/glsl: build string of dri options and use as input to building sha for shaders

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

glsl: reserve parameter storage on cache restore

Since we know how big the list will be we can allocate the storage
upfront.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

glsl: don't try to load/store buffer object values in the cache

Also add an assert to catch buffer overflows.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

glsl: don't reprocess or clear UBOs on cache fallback

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

glsl: skip more uniform initialisation when doing fallback linking

We already pull these values from the metadata cache so no need to
recreate them.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

glsl: don't lose uniform values when falling back to full compile

Here we skip the recreation of uniform storage if we are relinking
after a cache miss. This is improtant because uniform values may
have already been set by the application and we don't want to reset
them.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

glsl: don't reference shader prog data during cache fallback

We already have a reference.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

mesa/glsl: add cache_fallback flag to gl_shader_program_data

This will allow us to skip certain things when falling back to
a full recompile on a cache miss such as avoiding reinitialising
uniforms.

In this change we use it to avoid reading the program metadata
from the cache and skipping linking during a fallback.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

glsl: add api and glsl version to hash generation for shaders

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

glsl: cache uniform values

These may be lowered constant arrays or uniform values that we set before linking
so we need to cache the actual uniform values.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

glsl: make uniform values helper available for use elsewhere

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

glsl: cache some more image metadata

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

glsl: add support for caching atomic buffers

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

glsl: add shader cache support for buffer blocks

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

glsl: store subroutine remap table in shader cache

V2: use new helpers to store/restore table entries.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

glsl: add support for caching subroutines

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

glsl: add support for caching shaders with xfb qualifiers

For now this disables the shader cache when transform feedback is
enabled via the GL API as we don't currently allow for it when
generating the sha for the shader.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

glsl: add shader cache support for samplers

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

glsl: add basic support for resource list to shader cache

This initially adds support for simple uniforms and varyings.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

glsl: fix uniform remap table cache when explicit locations used

V2: don't store pointers use an enum instead to flag what should be
restored. Also do the work in a helper that we will later use for
the subroutine remap table.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

glsl: Serialize three additional hash tables with program metadata

The three additional tables are AttributeBindings, FragDataBindings,
and FragDataIndexBindings.

The first table (AttributeBindings) was identified as missing by
trying to test the shader cache with a program that called
glGetAttribLocation.

Many thanks to Tapani Pälli <tapani.palli@intel.com>, as it was review
of related work that he had done previously that pointed me to the
necessity to also save and restore FragDataBindings and
FragDataIndexBindings.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

glsl: use correct shader source in case of cache fallback

The scenario is:

glShaderSource
glCompileShader <-- deferred due to cache hit of shader

glShaderSource <-- with new source code

glAttachShader
glLinkProgram <-- no cache hit for program

At this point we need to compile the original source when we
fallback.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

glsl: make use of on disk shader cache

The hash key for glsl metadata is a hash of the hashes of each GLSL
source string.

This commit uses the put_key/get_key support in the cache put the SHA-1
hash of the source string for each successfully compiled shader into the
cache. This allows for early, optimistic returns from glCompileShader
(if the identical source string had been successfully compiled in the past),
in the hope that the final, linked shader will be found in the cache.

This is based on the intial patch by Carl.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

glsl: add initial implementation of shader cache

This uses disk_cache.c to write out a serialization of various
state that's required in order to successfully load and use a
binary written out by a drivers backend, this state is referred to as
"metadata" throughout the implementation.

This initial version is intended to work with all stages beside
compute.

This patch is based on the initial work done by Carl.

V2: extend the file's doxygen comment to cover some of the
design decisions.

V3:
- skip cache for fixed function shaders
- add int64 support
- fix glsl IR program parameter caching/restore and cache the
  parameter values which are used by gallium backends.
- use new link status enum

V4:
- add compute program support

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: use shared emit_umsb helper.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

radv/ac: use shared umsb helper.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>

radeon/ac: add emit umsb shared code.

Since we shared imsb, makes sense to share umsb.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

radeon/ac: use llvm.amdgcn.sffbh intrinsic instead of AMDGPU.flbit.i32

Use the newer intrinsic.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

radeonsi: use shared emit imsb code.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

radv/ac: use shader imsb emission code.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>

radeon/ac: add ac_emit_imsb helper.

We want to use a different intrinsic on newer llvm, so move this
code to a shared area.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

egl: _eglFilterArray's filter is always non-null

Drop the extra handling and assert() if things change in the future.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

docs: add hyperlink to the releasing documentation

Other files such as xlibdriver.html and versions.html explicitly left
out, for now.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

util/disk_cache: do not allow space in MESA_GLSL_CACHE_MAX_SIZE

No other env var used in mesa allows for space in the variable contents.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

configure.ac: remove unneeded trailing semicolon

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

r100: use correct libdrm_radeon macro

Remove local definition of RADEON_INFO_TILE_CONFIG and use the correct
macro provided by libdrm_radeon RADEON_INFO_TILING_CONFIG.

Latter was present as of libdrm 2.4.22, sirca 2010.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

winsys/radeon: remove fall-back defines

Provided by libdrm as of last commit.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

configure.ac: bump LIBDRM_RADEON requirement to 2.4.71

Such that we can remove all the local fall-back definitions and use the
official UABI ones.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

bin/get-fixes-pick-list.sh: add new script

The script parses the "Fixes" tags and nominates respective commit if
applicable.

Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

bin/get-pick-list.sh: remove ancient way of nominating patches

The old way of nominating patches [NOTE: .*[Cc]andidate] was
deprecated and has been unused for approx. 3 years.

Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

bin/get-pick-list.sh: limit `git grep ...' only as needed

Analogous to previous commit.

Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

bin/get-typod-pick-list.sh: limit `git grep ...' to only as needed

The currently used range HEAD..origin/master is far too broad. It looks
for nominations within the already_landed list (branchpoint..HEAD).

Similarly we look for already_landed whiting the [possible] nominations
Rand branchpoint..origin/master.

Improve things by limiting the look ups to the branch point.

Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

bin/get-extra-pick-list: rework to use already_picked list

Currently we loop (git log --grep) to check if the fix has landed. We
can simplify and make things faster by storing the already_picked list
and grep ping through it.

Slim down the message while we're here.

Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

bin/get-extra-pick-list: use git merge-base to get the branchpoint

Since mesa development history is linear and the only diversion is at
the branchpoint. Thus we can drop the ad-hoc parsing and use git
merge-base to retrieve it.

Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

docs: provide some tips where to obtain Mesa binaries

Mention the generic channels (PPA, Corp, other) as well as give a couple
of examples. Even if the latter became out of date the former should a
be good guide.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

docs/submittingpatches: assorted grammar fixes

Cc: Ben Crocker <bcrocker@redhat.com>
Suggested-by: Ben Crocker <bcrocker@redhat.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>